Page 1 C141-E224-01EN MHV2100BH, MHV2080BH MHV2060BH, MHV2040BH DISK DRIVES PRODUCT MANUAL...
Page 2: For Safe Operation
“Important Alert Items” in this manual. Keep this manual handy, and keep it carefully. FUJITSU makes every effort to prevent users and bystanders from being injured or from suffering damage to their property. Use the product according to this manual.
Page 3 Revision History (1/1) Revised section (*1) Edition Date Details (Added/Deleted/Altered) 2005-04-28 *1 Section(s) with asterisk (*) refer to the previous edition when those were deleted. C141-E224...
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Page 5 This manual describes MHV2100BH, MHV2080BH, MHV2060BH, MHV2040BH model of the MHV Series, 2.5-inch hard disk drives. These drives have a built-in controller that is compatible with the Serial-ATA interface. This manual describes the specifications and functions of the drives and explains in detail how to incorporate the drives into user systems.
Page 6: Operating Environment
Preface Conventions for Alert Messages This manual uses the following conventions to show the alert messages. An alert message consists of an alert signal and alert statements. The alert signal consists of an alert symbol and a signal word or just a signal word. The following are the alert signals and their meanings: In the text, the alert signal is centered, followed below by the indented message.
Page 7 “Disk drive defects” refers to defects that involve adjustment, repair, or replacement. Fujitsu is not liable for any other disk drive defects, such as those caused by user misoperation or mishandling, inappropriate operating environments, defects in the power supply or cable, problems of the host system, or other causes outside the disk drive.
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Page 9 Important Alert Items Important Alert Messages The important alert messages in this manual are as follows: A hazardous situation could result in minor or moderate personal injury if the user does not perform the procedure correctly. Also, damage to the product or other property, may occur if the user does not perform the procedure correctly.
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Page 11 Manual Organization MHV2100BH, MHV2080BH MHV2060BH, MHV2040BH DISK DRIVES PRODUCT MANUAL (C141-E224) <This manual> MHV2100BH, MHV2080BH MHV2060BH, MHV2040BH DISK DRIVES MAINTENANCE MANUAL (C141-F074) C141-E224 • Device Overview • Device Configuration • Installation Conditions • Theory of Device Operation • Interface • Operations •...
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Page 13: Table Of Contents
Device Overview... 1-1 CHAPTER 1 1.1 Features ...1-2 1.1.1 Functions and performance ...1-2 1.1.2 Adaptability ...1-2 1.1.3 Interface...1-3 1.2 Device Specifications ...1-4 1.2.1 Specifications summary ...1-4 1.2.2 Model and product number ...1-5 1.3 Power Requirements...1-6 1.4 Environmental Specifications ...1-8 1.5 Acoustic Noise ...1-9 1.6 Shock and Vibration...1-9 1.7 Reliability ...1-10 1.8 Error Rate ...1-11...
Page 14 Contents CHAPTER 2 Device Configuration... 2-1 2.1 Device Configuration ... 2-2 2.2 System Configuration ... 2-3 2.2.1 SATA interface... 2-3 2.2.2 Drive connection ... 2-3 Installation Conditions ... 3-1 CHAPTER 3 3.1 Dimensions ... 3-2 3.2 Mounting... 3-3 3.3 Connections with Host System... 3-9 3.3.1 Device connector...
Page 15 4.6 Read/write Circuit ...4-9 4.6.1 Read/write preamplifier (PreAMP)...4-9 4.6.2 Write circuit...4-9 4.6.3 Read circuit...4-10 4.6.4 Digital PLL circuit...4-11 4.7 Servo Control ...4-12 4.7.1 Servo control circuit ...4-12 4.7.2 Data-surface servo format ...4-16 4.7.3 Servo frame format...4-18 4.7.4 Actuator motor control ...4-19 4.7.5 Spindle motor control...4-20 CHAPTER 5 Interface ...
Page 16 Contents 5.2.3.1 FIS types ... 5-17 5.2.3.2 Register - Host to Device ... 5-17 5.2.3.3 Register - Device to Host ... 5-18 5.2.3.4 DMA Active - Device to Host... 5-18 5.2.3.5 DMA Setup - Device to Host or Host to Device (Bidirectional)...
Page 17 (24) FLUSH CACHE (X’E7’) ... 5-86 (25) WRITE BUFFER (X’E8’)... 5-87 (26) IDENTIFY DEVICE (X’EC’)... 5-88 (27) IDENTIFY DEVICE DMA (X’EE’)... 5-89 (28) SET FEATURES (X’EF’) ... 5-101 (29) SECURITY SET PASSWORD (X’F1’) ... 5-106 (30) SECURITY UNLOCK(X’F2’)... 5-108 (31) SECURITY ERASE PREPARE (X’F3’) ... 5-110 (32) SECURITY ERASE UNIT (X’F4’) ...
Page 18 Contents 5.4.5 DMA data-out command protocol ... 5-152 5.4.6 Native Command Queuing protocol ... 5-153 5.5 Power-on and COMRESET... 5-156 CHAPTER 6 Operations ... 6-1 6.1 Reset and Diagnosis... 6-2 6.1.1 Response to power-on ... 6-2 6.1.2 Response to COMRESET ... 6-4 6.1.2.1 Software settings preservation...
Page 19 Contents Glossary ... GL-1 Acronyms and Abbreviations...AB-1 Index ... IN-1 C141-E224...
Page 20 Contents Figures Figure 1.1 Negative voltage at +5 V when power is turned off... 1-6 Figure 1.2 Current fluctuation (Typ.) at +5 V when power is turned on... 1-8 Figure 2.1 Disk drive outerview... 2-2 Figure 2.2 Drive system configuration ... 2-3 Figure 3.1 Dimensions ...
Page 21 Figure 5.11 Non-data command protocol ...5-147 Figure 5.12 PIO data-in command protocol ...5-149 Figure 5.13 PIO data-out command protocol ...5-150 Figure 5.14 DMA data-in command protocol ...5-151 Figure 5.15 DMA data-out command protocol ...5-152 Figure 5.16 READ FP DMA QUEUED command protocol ...5-154 Figure 5.17 WRITE FP DMA QUEUED command protocol ...5-155 Figure 5.18 Power-on sequence...5-156 Figure 5.19 COMRESET sequence ...5-157...
Page 22 Contents Tables Table 1.1 Specifications ... 1-4 Table 1.2 Examples of model names and product numbers ... 1-5 Table 1.3 Current and power dissipation ... 1-7 Table 1.4 Environmental specifications... 1-8 Table 1.5 Acoustic noise specification ... 1-9 Table 1.6 Shock and vibration specification... 1-9 Table 1.7 Advanced Power Management ...
Page 23 Contents Table 5.26 Features field values and settable modes ...5-101 Table 5.27 Contents of SECURITY SET PASSWORD data...5-106 Table 5.28 Relationship between combination of Identifier and Security level, and operation of the lock function ...5-106 Table 5.29 Contents of security password ...5-114 Table 5.30 Data format of Read Log Ext log page 10h...5-129 Table 5.31 Tag field information...5-129 Table 5.32 Data format of Read Log Ext log page 11h...5-130...
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Page 25: Chapter 1 Device Overview
CHAPTER 1 Device Overview Features Device Specifications Power Requirements Environmental Specifications Acoustic Noise Shock and Vibration Reliability Error Rate Media Defects 1.10 Load/Unload Function 1.11 Advanced Power Management (APM) 1.12 Interface Power Management (IPM) Overview and features are described in this chapter, and specifications and power requirement are described.
Page 26: Features
30 recording zone technology. The disk drive has a formatted capacity of 100 GB (MHV2100BH), 80 GB (MHV2080BH), 60 GB (MHV2060BH) and 40 GB (MHV2040BH) respectively. (4) High-speed Transfer rate The disk drive (the MHV2xxxBH Series) has an internal data rate up to 64.0 MB/s.
Page 27: Interface
(3) Low noise and vibration In Ready status (while the device is waiting for any commands), the Sound Power level of the disk drives in idle mode is 2.2B [MHV2040BH]/2.6B[MHV2060BH, MHV2080BH, MHV2100BH]. The Sound Pressure level is 22dB [MHV2040BH]/28dB [MHV2060BH, MHV2080BH, MHV2100BH], as measured 0.3 m from the drive in Idle mode.
Page 28: Device Specifications
Compliant with ATA/ATAPI-7, SATA II Ext to SATA1.0a, SATA II Electrical Spec.1.0 64.0 MB/s Max. 1.5 Gbps (150 MB/s) Max. 8 MB (8,388,608 bytes) 9.5 mm × 100.0 mm × 70.0 mm (*4) 101 g (max) MHV2040BH 60 GB 40 GB 78,140,160 96 g (max) C141-E224...
Page 29: Model And Product Number
MHV2080BH 8.45 GB MHV2060BH 8.45 GB MHV2040BH 8.45 GB 1.2.2 Model and product number Table 1.2 lists the model names and product numbers of the disk drive. The model name does not necessarily correspond to the product number as listed in Table 1.2 since some models have been customized and have specifications...
Page 30: Power Requirements
Device Overview 1.3 Power Requirements (1) Input Voltage • + 5 V ± 5 % • It is unnecessary for this drive to supply +3.3 V and +12 V power supplies. (2) Ripple Maximum Frequency (3) A negative voltage like the bottom figure isn't to occur at +5 V when power is turned off and, a thing with no ringing.
Page 31: Table 1.3 Current And Power Dissipation
26 mA 26 mA 0.006 W/GB (rank E / MHV2100BH) 0.008 W/GB (rank E / MHV2080BH) — 0.010 W/GB (rank E / MHV2060BH) 0.015 W/GB (rank D / MHV2040BH) 1.3 Power Requirements 5.0 W 0.60 W 1.9 W 2.1 W 0.13 W...
Page 32: Environmental Specifications
Device Overview (5) Current fluctuation (Typ.) at +5 V when power is turned on Figure 1.2 Current fluctuation (Typ.) at +5 V when power is turned on (6) Power on/off sequence The voltage detector circuits monitor +5 V. The circuits do not allow a write signal if either voltage is abnormal.
Page 33: Acoustic Noise
Vibration (Swept sine, 1/4 octave per minute) • Operating • Non-operating Shock (half-sine pulse) • Operating • Non-operating C141-E224 Specification (typical) 2.2 B [MHV2040BH] 2.6 B [MHV2100BH/MHV2080BH/MHV2060BH] 22 dB [MHV2040BH] 28 dB [MHV2100BH/MHV2080BH/MHV2060BH] Specification 5 to 500 Hz, 9.8m/s 0-peak (1G 0-peak) (without non-recovered errors)
Page 34: Reliability
Device Overview 1.7 Reliability (1) Mean time between failures (MTBF) Conditions of 300,000 h MTBF is defined as follows: Total operation time in all fields MTBF= number of device failure in all fields (*1) *1 “Disk drive defects” refers to defects that involve repair, readjustment, or replacement.
Page 35: Error Rate
1.8 Error Rate Known defects, for which alternative blocks can be assigned, are not included in the error rate count below. It is assumed that the data blocks to be accessed are evenly distributed on the disk media. (1) Unrecoverable read error Read errors that cannot be recovered by maximum read retries of drive without user’s retry and ECC corrections shall occur no more than 10 times when reading data of 10...
Page 36: Recommended Power-Off Sequence
Device Overview Emergency Unload other than Unload is performed when the power is shut down while the heads are still loaded on the disk. The product supports the Emergency Unload a minimum of 20,000 times. When the power is shut down, the controlled Unload cannot be executed. Therefore, the number of Emergency other than Unload is specified.
Page 37: Table 1.7 Advanced Power Management
Low Power Idle: Standby: In APM Mode-1, which is the APM default mode, the operation status shifts till it finally reaches "Low Power Idle." Table 1.7 Advanced Power Management APM Mode Mode-0 Mode-1 Mode-2 When the maximum time that the HDD is waiting for commands has been exceeded: Mode-0: Mode shifts from Active condition to Active Idle in 0.2-1.2, and to Low Power Idle in 15 minutes.
Page 38: Interface Power Management (Ipm)
Device Overview 1.12 Interface Power Management (IPM) 1.12.1 Host-initiated interface power management (HIPM) When the disk drive is waiting for commands, it can enter one of three IPM modes as requested by the host. The three IPM modes are: 1) Partial mode: 2) Slumber mode: PMREQ_S is sent when the host requests the Slumber mode.
Page 39: Elimination Of Hazardous Substances
2) Some particulars under consideration have not determined at present as a permissible limit of banned materials content in RoHS directive. Such case, we use the original criterion of Fujitsu limited which is provided under the reference restrictions already established as ELV or an internal environmental low of each countries in EU.
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Page 41: Chapter 2 Device Configuration
CHAPTER 2 Device Configuration Device Configuration System Configuration This chapter describes the internal configurations of the hard disk drives and the configuration of the systems in which they operate. C141-E224...
Page 42: Device Configuration
Device Configuration 2.1 Device Configuration Figure 2.1 shows the disk drive. The disk drive consists of a disk enclosure (DE), read/write preamplifier, and controller PCA. The disk enclosure contains the disk media, heads, spindle motors, actuators, and a circulating air filter. Figure 2.1 Disk drive outerview (1) Disk The outer diameter of the disk is 65 mm.
Page 43: System Configuration
(6) Read/write circuit The read/write circuit uses a LSI chip for the read/write preamplifier. It improves data reliability by preventing errors caused by external noise. (7) Controller circuit The controller circuit supports Serial-ATA interface, and it realized a high performance by integration into LSI. 2.2 System Configuration 2.2.1 SATA interface Figure 2.2 shows the SATA interface system configuration.
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Page 45: Chapter 3 Installation Conditions
CHAPTER 3 Installation Conditions Dimensions Mounting Cable Connections This chapter gives the external dimensions, installation conditions, surface temperature conditions, cable connections, and switch settings of the hard disk drives. C141-E224...
Page 46: Dimensions
Installation Conditions 3.1 Dimensions Figure 3.1 illustrates the dimensions of the disk drive. All dimensions are in mm. The PCA and connectors are not included in these dimensions. Dimension from the center of the user tap to the base of the connector pins Length of the connector pins Dimension from the outer edge of the user tap to the center of the connector pins...
Page 47: Mounting
3.2 Mounting For information on mounting, see the "FUJITSU 2.5-INCH HDD INTEGRATION GUIDANCE (C141-E144)." (1) Orientation Figure 3.2 illustrates the allowable orientations for the disk drive. (a) Horizontal –1 (c) Vertical –1 (e) Vertical –3 C141-E224 (b) Horizontal –2 (d) Vertical –2 (f) Vertical –4...
Page 48: Figure 3.3 Mounting Frame Structure
Installation Conditions (2) Frame The MR head bias of the HDD disk enclosure (DE) is zero. The mounting frame is connected to Signal Ground (SG). Use M3 screw for the mounting screw and the screw length should satisfy the specification in Figure 3.3. The tightening torque must be 0.49N•m (5kgf•cm).
Page 49: Figure 3.4 Location Of Breather
3.2 Mounting IMPORTANT Because of breather hole mounted to the HDD, do not allow this to close during mounting. Locating of breather hole is shown as Figure 3.4. For breather hole of Figure 3.4, at least, do not allow its around φ...
Page 50: Figure 3.5 Surface Cover Temperature Measurement Points
Installation Conditions (4) Ambient temperature The temperature conditions for a disk drive mounted in a cabinet refer to the ambient temperature at a point 3 cm from the disk drive. The ambient temperature must satisfy the temperature conditions described in Section 1.4, and the airflow must be considered to prevent the DE surface cover temperature from exceeding 60 °...
Page 51: Figure 3.6 Service Area
(5) Service area Figure 3.6 shows how the drive must be accessed (service areas) during and after installation. Mounting screw hole Cable connection Data corruption: Avoid mounting the disk drive near strong magnetic sources such as loud speakers. Ensure that the disk drive is not affected by external magnetic fields.
Page 52: Figure 3.7 Handling Cautions
Installation Conditions General notes Wrist strap Use the Wrist strap. Do not hit HDD each other. Do not place HDD vertically to avoid falling down. Figure 3.7 Handling cautions Installation Please use the driver of a low impact when you use an electric driver. HDD is occasionally damaged by the impact of the driver.
Page 53: Connections With Host System
3.3 Connections with Host System 3.3.1 Device connector The disk drive has the SATA interface connectors listed below for connecting external devices. Figure 3.8 shows the locations of these connectors and terminals. SATA interface and power connectors Figure 3.8 Connector locations C141-E224 3.3 Connections with Host System...
Page 54: Signal Segment And Power Supply Segment
Installation Conditions 3.3.2 Signal segment and power supply segment Figure 3.9 shows each segment of the SATA interface connector and pin numbers. Power supply segment P1 pins in the power supply segment Figure 3.9 Power supply pins (CN1) 3.3.3 Connector specifications for host system Table 3.2 lists the recommended specifications for the host interface connectors.
Page 55: Sata Interface Cable Connection
3.3.4 SATA interface cable connection The cable that connects the disk drive to the host system must be compliant with the Serial ATA 1.0a specification. 3.3.5 Note about SATA interface cable connection Take note of the following precaution about plugging a SATA interface cable into the SATA interface connector of the disk drive and plugging the connector into a host receptacle: When plugging together the disk drive SATA interface connector...
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Page 57: Chapter 4 Theory Of Device Operation
CHAPTER 4 Theory of Device Operation Outline Subassemblies Circuit Configuration Power-on Sequence Self-calibration Read/write Circuit Servo Control This chapter explains basic design concepts of the disk drive. Also, this chapter explains subassemblies of the disk drive, each sequence, servo control, and electrical circuit blocks.
Page 58: Outline
Theory of Device Operation 4.1 Outline This chapter consists of two parts. First part (Section 4.2) explains mechanical assemblies of the disk drive. Second part (Sections 4.3 through 4.7) explains a servo information recorded in the disk drive and drive control method. 4.2 Subassemblies The disk drive consists of a disk enclosure (DE) and printed circuit assembly (PCA).
Page 59: Air Filter
4.2.4 Air filter There are two types of air filters: a breather filter and a circulation filter. The breather filter makes an air in and out of the DE to prevent unnecessary pressure around the spindle when the disk starts or stops rotating. When disk drives are transported under conditions where the air pressure changes a lot, filtered air is circulated in the DE.
Page 60: Figure 4.1 Power Supply Configuration
Theory of Device Operation (4) Controller circuit Major functions are listed below. • Serial-ATA interface control and data transfer control • Data buffer management • Sector format control • Defect management • ECC control • Error recovery and self-diagnosis Figure 4.1 Power supply configuration C141-E224...
Page 61: Figure 4.2 Circuit Configuration
Data Buffer SDRAM Serial Flash ROM Shock Sensor SP Motor Media Figure 4.2 Circuit configuration C141-E224 4.3 Circuit Configuration Serial-ATA Interface Console MCU & HDC & RDC Micro-DSP Crystal 40MHz Thermist R/W Pre-Amp HEAD...
Page 62: Power-On Sequence
Theory of Device Operation 4.4 Power-on Sequence Figure 4.3 describes the operation sequence of the disk drive at power-on. The outline is described below. a) After the power is turned on, the disk drive executes the MPU bus test, internal register read/write test, and work RAM read/write test. When the self-diagnosis terminates successfully, the disk drive starts the spindle motor.
Page 63: Self-Calibration
4.5 Self-calibration The disk drive occasionally performs self-calibration in order to sense and calibrate mechanical external forces on the actuator, and VCM torque. This enables precise seek and read/write operations. 4.5.1 Self-calibration contents (1) Sensing and compensating for external forces The actuator suffers from torque due to the FPC forces and winds accompanying disk revolution.
Page 64: Execution Timing Of Self-Calibration
Theory of Device Operation 4.5.2 Execution timing of self-calibration Self-calibration is performed once when power is turned on. After that, the disk drive does not perform self-calibration until it detects an error. That is, self-calibration is performed each time one of the following events occur: •...
Page 65: Read/Write Circuit
4.6 Read/write Circuit The read/write circuit consists of the read/write preamplifier (PreAMP), the write circuit, the read circuit, and the time base generator in the read channel (RDC) block which is integrated into LSI. Figure 4.4 is a block diagram of the read/write circuit.
Page 66: Read Circuit
Theory of Device Operation 4.6.3 Read circuit The head read signal from the PreAMP is regulated by the automatic gain control (AGC) circuit. Then the output is converted into the sampled read data pulse by the programmable filter circuit and the flash digitizer circuit. This signal is converted into the read data by the decorder circuit based on the read data maximum-likelihood-detected by the Viterbi detection circuit.
Page 67: Digital Pll Circuit
(3) FIR circuit This circuit is 10-tap sampled analog transversal filter circuit that equalizes the head read signal to the Modified Extended Partial Response (MEEPR) waveform. (4) A/D converter circuit This circuit changes Sampled Read Data Pulse from the FIR circuit into Digital Read Data.
Page 68: Servo Control
Theory of Device Operation 4.7 Servo Control The actuator motor and the spindle motor are submitted to servo control. The actuator motor is controlled for moving and positioning the head to the track containing the desired data. To turn the disk at a constant velocity, the actuator motor is controlled according to the servo data that is written on the data side beforehand.
Page 69: Index
(1) Microprocessor unit (MPU) The MPU executes startup of the spindle motor, movement to the reference cylinder, seek to the specified cylinder, and calibration operations. The main internal operations of the MPU are shown below. Spindle motor start Starts the spindle motor and accelerates it to normal speed when power is applied.
Page 70 Theory of Device Operation (6) Driver circuit The driver circuit is a power amplitude circuit that receives signals from the spindle motor control circuit and feeds currents to the spindle motor. (7) VCM current sense resistor (CSR) This resistor controls current at the power amplifier by converting the VCM current into voltage and feeding back.
Page 71: Data-Surface Servo Format
4.7.2 Data-surface servo format Figure 4.7 describes the physical layout of the servo frame. The three areas indicated by (1) to (3) in Figure 4.7 are described below. (1) Inner guard band This area is located inside the user area, and the rotational speed of the VCM can be controlled on this cylinder area for head moving.
Page 72: Figure 4.7 Physical Sector Servo Configuration On Disk Surface
Theory of Device Operation Figure 4.7 Physical sector servo configuration on disk surface 4-16 C141-E224...
Page 73: Servo Frame Format
4.7.3 Servo frame format As the servo information, the IDD uses the phase signal servo generated from the gray code and servo EVEN and ODD. This servo information is used for positioning operation of radius direction and position detection of circumstance direction.
Page 74: Actuator Motor Control
Theory of Device Operation 4.7.4 Actuator motor control The voice coil motor (VCM) is controlled by feeding back the servo data recorded on the data surface. The MPU fetches the position sense data on the servo frame at a constant interval of sampling time, executes calculation, and updates the VCM drive current.
Page 75: Spindle Motor Control
(called SVC hereafter). The firmware operates on the MPU manufactured by Fujitsu. The spindle motor is controlled by sending several signals from the MPU to the SVC. There are three modes for the spindle control; start mode, acceleration mode, and stable rotation mode.
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Page 77: Chapter 5 Interface
CHAPTER 5 Interface Physical Interface Logical Interface Host Commands Command Protocol Power-on and COMRESET This chapter gives details about the interface, and the interface commands and timings. C141-E224...
Page 78: Physical Interface
Interface 5.1 Physical Interface 5.1.1 Interface signals Figure 5.1 shows the interface signals. TX data TX− RX data Host analog front RX− ComWake ComInit Figure 5.1 Interface signals An explanation of each signal is provided below. TX + / TX - These signals are the outbound high speed differential signals that are connected to the serial ATA cable.
Page 79 RxData Serially encoded 10b data attached to the high speed serial differential line receiver COMWAKE Signal from the out of band detector that indicates the COMWAKE out of band signal is being detected. COMRESET / COMINIT Host: Signal from the out of band detector that indicates the COMINIT out of band signal is being detected.
Page 80: Signal Interface Regulation
Interface 5.1.2 Signal interface regulation 5.1.2.1 Out of band signaling During OOB signaling transmissions, the differential and common mode levels of the signal lines shall comply with the same electrical specifications as for in-band data transmission, specified as follows. COMRESET/COMINIT COMWAKE 106.7 ns 106.7 ns...
Page 81: Primitives Descriptions
5.1.2.2 Primitives descriptions The following table contains the primitive mnemonics and a brief description of each. Primitive Name ALIGN Physical layer control CONT Continue repeating previous primitive End of frame PMACK Power management acknowledge HOLD Hold data transmission HOLDA Hold acknowledge PMNAK Power management denial...
Page 82 Interface Primitive Name R_IP Reception in progress R_OK Reception with no error R_RDY Receiver ready Start of frame SYNC Synchronization WTRM Wait for frame termination X_RDY Transmission data ready Description Current node (host or device) is receiving payload. Current node (host or device) detected no error in received payload.
Page 83: Electrical Specifications
5.1.3 Electrical specifications Table 5.1 Physical Layer Electrical Requirements (1/3) a) General Specifications Units Channel Speed Fbaud FER, Frame Error Rate Unit Interval tol, TX Frequency Long Term Stability SSC, Spread-Spectrum Modulation Frequency tol, Spread-Spectrum Modulation Deviation cm,dc, DC Coupled Common Mode Voltage cm,ac coupled, AC Coupled...
Page 84 Interface Table 5.1 Physical Layer Electrical Requirements (2/3) b) Transmitter Specifications Units diffTX, TX Pair Differential Impedance s-eTX, TX Single-Ended Impedance c) Transmitted Signal Requirements Units diffTX, mVppd TX Differential Output Voltage 20-80TX, (UI) TX Rise/Fall Time skewTX, TX Differential Skew TJ at Connector, Data-Data, 5UI DJ at Connector,...
Page 85 Table 5.1 Physical Layer Electrical Requirements (3/3) d) Receiver Specifications Units diffRX, RX Pair Differential Impedance s-eRX, RX Single-Ended Impedance e) OOB Specifications Units thresh, mVppd OOB Signal Detection Threshold OOB, UI During OOB Signaling COMINIT/COMRESET COMWAKE Transmit Burst Length COMINIT/COMRESET Transmit Gap Length COMWAKE...
Page 86: Connector Pinouts
Interface 5.1.4 Connector pinouts The pin definitions are shown in Table 5.2. Table 5.2 Connector pinouts “Key and spacing separate signal and power segments” Staggered Spin-up Mode/ Ready LED Power segment key Notes: Note) Since applying a single external supply voltage of 5 V enables this drive to operate it is unnecessary to supply +3.3 V and +12 V power supplies.
Page 87: P11 Function
5.1.5 P11 function The disk drive supports the following functions when P11 pin in the power supply segment of interface connector is used as an input or output pin. P11 pin supports the functions as follows: • Staggered Spin-up: • Driving Ready LED: The following is P11 setting and hardware requirement for these functions 5.1.5.1 Staggered Spin-up...
Page 88: Figure 5.2 Example Of The Circuit For Driving Ready Led
Interface Figure 5.2 Example of the circuit for driving Ready LED 5-12 C141-E224...
Page 89: Hot Plug
5.1.6 Hot Plug The disk drive is “Hot Plug Capable” which is based on Serial ATA II Extension to Serial ATA 1.0a Specification. It is recommended to use the pre-charge resistor for protection from over current at +5V power supply circuit in the host system when the disk drive is hot- plugged.
Page 90: Logical Interface
Interface 5.2 Logical Interface The host system and the device communicate with each other by sending and receiving serial data. The host and the device have several dedicated communication layers between them. These layers have different functions, enabling communication between the different levels of layers within the host or device and between layers at the same level that link the host and device.
Page 91: Communication Layers
5.2.1 Communication layers Each of the layers is outlined below. Physical layer • Detects, sends, and receives band signals. • Sends serial data to and receives it from the link layer. Link layer • Negotiates against mutual transfer requests between the host system and device.
Page 92: Outline Of The Shadow Block Register
Interface 5.2.2 Outline of the Shadow Block Register Each transport layer in the host system and device has a block register, which is called a Shadow Block Register in the host system, and a Block Register in the device. These registers are used when the host system issues a command to the device. Table 5.4 Shadow Block Register Read Error...
Page 93: Outline Of The Frame Information Structure (Fis)
5.2.3 Outline of the frame information structure (FIS) The transport layer converts data written in a Block Register into the FIS, and sends it to the upper layer. The FIS, which is generated in the transport layer, is explained below. 5.2.3.1 FIS types The types of FIS are as follows (Each FIS is referred to as abbreviation in square brackets in this manual.):...
Page 94: Register - Device To Host
Interface The host system uses the Register - Host to Device FIS when information in the Register Block is transferred from the host system to the device. This is the mechanism for issuing the ATA command from the host system to the device. C - To update the Command field, "1"...
Page 95: Dma Setup - Device To Host Or Host To Device (Bidirectional)
The host uses the DMA Active - Device to Host FIS layout. This FIS instructs the host to continue transferring DMA data from the host to the device. 5.2.3.5 DMA Setup - Device to Host or Host to Device (Bidirectional) The DMA Setup - Device to Host or Host to Device FIS has the following layout: Reserved (0) Figure 5.7 DMA Setup - Device to Host or Host to Device FIS layout...
Page 96: Bist Active - Bidirectional
Interface 5.2.3.6 BIST Active - Bidirectional The BIST Active - Bidirectional FIS has the following layout: Reserved (0) Pattern definition T A S L F P R V Data [31:24] Data [31:24] Figure 5.8 BIST Active - Bidirectional FIS layout The BIST Active - Bidirectional FIS is used to set the receiver to Loop Back mode.
Page 97: Data - Host To Device Or Device To Host (Bidirectional)
5.2.3.7 Data - Host to Device or Device to Host (Bidirectional) This Data FIS has the following layout: Reserved (0) … … Figure 5.9 Data FIS (Bidirectional) layout The Data FIS is used for data transfers between the host system and device. C141-E224 Reserved (0) R R R Reserved (0)
Page 98: Shadow Block Registers
Interface 5.2.4 Shadow block registers Error Field The Error Field indicates the status of the command executed by the device. The fields are valid when the ERR bit of the Status field is 1. This register contains a diagnostic code after power is turned on, the COMRESET or the EXECUTIVE DEVICE DIAGNOSTIC command is executed.
Page 99 - X’03’: Data Buffer Diagnostic Error. - X’04’: Memory Diagnostic Error. - X’05’: Reading the system area is abnormal. - X’06’: Calibration is abnormal. Features Field (exp) The Features Field provides specific feature to a command. For instance, it is used with SET FEATURES command to enable or disable caching.
Page 100 Interface Cylinder High Field (exp) The contents of this field indicates high-order 8 bits of the disk-access start cylinder address. At the end of a command, the contents of this field are updated to the current cylinder number. The high-order 8 bits of the cylinder address are set to the Cylinder High Register.
Page 101 Status field The contents of this field indicate the status of the device. The contents of this field are updated at the completion of each command. When the BSY bit is 1, other bits of this field, are invalid. Bit 7 Bit 6 DRDY - Bit 7:...
Page 102 Interface Command Field The Command Field contains a command code being sent to the device. After this field is written, the command execution starts immediately. Table 5.3 lists the executable commands and their command codes. This table also lists the necessary parameters for each command which are written to certain fields before the Command register is written.
Page 103: Host Commands
5.3 Host Commands The host system issues a command to the device by writing necessary parameters in related fileds in the shadow block registers and writing a command code in the Command field of the shadow block registers. The device can accept the command when the BSY bit is 0 (the device is not in the busy status).
Page 104 Interface Table 5.6 Command code and parameters (2/3) COMMAND NAME IDLE CHECK POWER MODE SLEEP SMART DEVICE CONFIGURATION READ MULTIPLE WRITE MULTIPLE SET MULTIPLE MODE READ DMA WRITE DMA READ BUFFER FLUSH CACHE WRITE BUFFER IDENTIFY DEVICE IDENTIFY DEVICE DMA SET FEATURES SECURITY SET PASSWORD SECURITY UNLOCK...
Page 105 Table 5.6 Command code and parameters (3/3) COMMAND NAME READ LOG EXT WRITE SECTOR(S) EXT WRITE DMA EXT SET MAX ADDRESS EXT WRITE MULTIPLE EXT WRITE LOG EXT READ VERIFY SECTOR(S) EXT FLUSH CACHE EXT WRITE MULTIPLE FUA EXT WRITE DMA FUA EXT READ FP DMA QUEUED WRITE FP DMA QUEUED CY: cylinder field...
Page 106: Command Descriptions
Interface 5.3.2 Command descriptions The contents of the shadow block registers to be necessary for issuing a command and the example indication of the shadow block registers at command completion are shown as following in this subsection. Example: READ SECTOR (S) At command issuance (Shadow Block Registers setting contents) CH EXP...
Page 107: Recalibrate (X'10' To X'1F')
RECALIBRATE (X’10’ to X’1F’) This command performs the calibration. When the device completes the calibration, the device reports the status to the host system. This command can be issued in the LBA mode. • Error reporting conditions (1) An error was detected during head positioning (ST = 51h, ER = 02h). (2) A SATA communication error occurred (ST = 51h, ER = 14h).
Page 108: Read Sector(S) (X'20' Or X'21')
Interface READ SECTOR(S) (X’20’ or X’21’) This command reads data of sectors specified in the Sector Count field from the address specified in the Device/Head, Cylinder High, Cylinder Low and Sector Number fields. Number of sectors can be specified from 1 to 256 sectors. To specify 256 sectors reading, ‘00’...
Page 109 At command issuance (Shadow Block Registers setting contents) (R: Retry) At command completion (Shadow Block Registers contents to be read) *1 If the command is terminated due to an error, the remaining number of sectors of which data was not transferred. C141-E224 HD No.
Page 110: Write Sector(S) (X'30' Or X'31')
Interface WRITE SECTOR(S) (X’30’ or X’31’) This command writes data of sectors from the address specified in the Device/Head, Cylinder High, Cylinder Low, and Sector Number fields to the address specified in the Sector Count field. Number of sectors can be specified from 1 to 256 sectors.
Page 111 At command issuance (Shadow Block Registers setting contents) (R: Retry) At command completion (Shadow Block Registers contents to be read) If the command was terminated because of an error, the number of sectors for which data has not been written is set in this field. C141-E224 HD No.
Page 112: Write Verify (X'3C')
Interface WRITE VERIFY (X’3C’) This command operates similarly to the WRITE SECTOR(S) command except that the device verifies each sector immediately after being written. The verify operation is a read and check for data errors without data transfer. Any error that is detected during the verify operation is posted.
Page 113 At command completion (Shadow Block Registers contents to be read) *1 If the command is terminated because of an error, the number of remaining sectors for which data has not been written or verified is set in this register. C141-E224 Status information HD No.
Page 114: Read Verify Sector(S) (X'40' Or X'41')
Interface READ VERIFY SECTOR(S) (X’40’ or X’41’) This command operates similarly to the READ SECTOR(S) command except that the data is not transferred to the host system. After all requested sectors are verified, the device reports the status to the host system.
Page 115 At command completion (Shadow Block Registers contents to be read) *1 If the command is terminated due to an error, the remaining number of sectors of which data was not transferred is set in this register. C141-E224 Status information HD No. / LBA Start cylinder No.
Page 116: Seek (X'70' To X'7F')
Interface SEEK (X’70’ to X’7F’) This command performs a seek operation to the track and selects the head specified in the command block registers. After completing the seek operation, the device reports the status to the host system. In the LBA mode, this command performs the seek operation to the cylinder and head position in which the sector is specified.
Page 117: Execute Device Diagnostic (X'90')
EXECUTE DEVICE DIAGNOSTIC (X’90’) This command performs an internal diagnostic test (self-diagnosis) of the device. The device reports the diagnostic result and status to the host. Table 5.7 lists the diagnostic code written in the Error field which is 8-bit code. Code X’00’...
Page 118: Initialize Device Parameters (X'91')
Interface INITIALIZE DEVICE PARAMETERS (X’91’) The host system can set the number of sectors per track and the maximum head number (maximum head number is “number of heads minus 1”) per cylinder with this command. Upon receipt of this command, the device sets the parameters. Then the device reports the status to the host system.
Page 119: Download Microcode (X'92')
DOWNLOAD MICROCODE (X’92’) At command issuance (Shadow Block Registers setting contents) At command completion (Shadow Block Registers contents to be read) This command rewrites the microcode of the device (firmware). When this command is accepted, the device does beginning the data transfer of the microcode or the microcode rewriting according to Subcommand code (Rewriting is also possible simultaneously with the data transfer).
Page 120: Table 5.9 Example Of Rewriting Procedure Of Data 512K Bytes (80000H Bytes) Of Microcode
Interface **: In the following cases, Subcommand code=07h returns Abort as an error though becomes Microcode rewriting execution specification. 1) Abnormality of the transmitted Microcode data is detected. 2) The data transfer is not done (The number of transfer: 0). 3) The DOWNLOAD MICROCODE command is not continuously issued when the transfer has been divided into multiple transfers.
Page 121: Standby Immediate (X'94' Or X'e0')
(10) STANDBY IMMEDIATE (X’94’ or X’E0’) Upon receipt of this command, the device enters the standby mode. The device then reports the status to the host system. This command does not support the APS timer function. • Error reporting conditions (1) A SATA communication error occurred (ST = 51h, ER = 14h).
Page 122: Idle Immediate (X'95' Or X'e1')
Interface (11) IDLE IMMEDIATE (X’95’ or X’E1’) Upon receipt of this command, the device enters the idle mode. Then, the device reports the status to the host system. This command does not support the APS timer function. • Error reporting conditions (1) A SATA communication error occurred (ST = 51h, ER = 14h).
Page 123: Standby (X'96' Or X'e2')
(12) STANDBY (X’96’ or X’E2’) Upon receipt of this command, the device enters the standby mode. If the device has already spun down, the spin-down sequence is not implemented. If the Sector Count field has a value other than "0," the APS timer is set when the command is received.
Page 124: Idle (X'97' Or X'e3')
Interface (13) IDLE (X’97’ or X’E3’) Upon receipt of this command, the device enters the idle mode. The device report the status even if the device has not fully entered the idle mode. If the spindle of the device is already rotating, the spin-up sequence shall not be implemented. By using this command, the APS (Automatic Power Standby) timer function is enabled and the timer immediately starts the countdown.
Page 125 At command completion (Shadow Block Registers contents to be read) C141-E224 Status information Error information 5.3 Host Commands 5-49...
Page 126: Check Power Mode (X'98' Or X'e5')
Interface (14) CHECK POWER MODE (X’98’ or X’E5’) The host checks the power mode of the device with this command. The host system can confirm the power save mode of the device by the contents of the Sector Count field after executing this command. The device sets the following field value.
Page 127: Sleep (X'99' Or X'e6')
(15) SLEEP (X’99’ or X’E6’) This command is the only way to make the device enter the sleep mode. Upon receipt of this command, the device enters the sleep mode, then reports the status to the host system. The device report the status even if the device has not fully entered the sleep mode.
Page 128: Smart (X'b0')
Interface (16) SMART (X’B0’) This command predicts the occurrence of device failures depending on the subcommand specified in the Features field. If the Features field contains values that are not supported with the command, the Aborted Command error is issued. Before issuing the command, the host must set the key values in the Cylinder Low and Cylinder High field (4Fh in the Cylinder Low field and C2h in the Cylinder High field).
Page 129: Table 5.10 Features Field Values (Subcommands) And Functions (1/3
Table 5.10 Features Field values (subcommands) and functions (1/3) Features Field X’D0’ SMART READ DATE: A device that received this subcommand saves all the updated attribute values. The device then transfers 512-byte attribute value information to the host after transferring PIOSU. * For information about the format of the attribute value information, see Table 5.11.
Page 130 Interface Table 5.10 Features Field values (subcommands) and functions (2/3) Features Field X’D5’ SMART READ LOG: A device which receives this sub-command reads the log sector specified in the Sector Number Field. Next, it transfers the PIOSU and transmits the log sector to the host computer.
Page 131 Table 5.10 Features Field values (subcommands) and functions (3/3) Features Field X’DA’ SMART RETURN STATUS: When the device receives this subcommand, it saves the current device attribute values. Then the device compares the device attribute values with guarantee failure threshold values. If there is an attribute value exceeding the threshold, F4h and 2Ch are loaded into the Cylinder Low and Cylinder High field.
Page 132 Interface At command issuance (Shadow Block Registers setting contents) At command completion (Shadow Block Registers contents to be read) The attribute value information is 512-byte data; the format of this data is shown the following Table 5.11. The host can access this data using the SMART READ DATE subcommand (Features field = D0h).
Page 133: Table 5.11 Format Of Device Attribute Value Data
Table 5.11 Format of device attribute value data Byte Data format version number Attribute 1 07 to 0C 0E to 169 Attribute 2 to attribute 30 Off-line data collection status Self-test execution status 16C, 16D Off-line data collection execution time [sec.] Reserved Off-line data collection capability 170, 171...
Page 134 Interface • Data format version number The data format version number indicates the version number of the data format of the device attribute values or guarantee failure thresholds. The data format version numbers of the device attribute values and guarantee failure thresholds are the same.
Page 135 • Status Flag If this bit is 1, it indicates normal operations are assured with the attribute when the attribute value exceeds the threshold value. If this bit is 1 (0), it indicates the attribute only updated by an on- line test (off-line test).
Page 136: Table 5.13 Off-Line Data Collection Status
Interface Table 5.13 Off-line data collection status Status Byte 00h or 80h Off-line data collection is not executed. 02h or 82h Off-line data collection has ended without an error. 04h or 84h Off-line data collection is interrupted by a command from the host. 05h or 85h Off-line data collection has ended before completion because of a command from the host.
Page 137: Table 5.15 Off-Line Data Collection Capability
• Off-line data collection capability Indicates the method of off-line data collection carried out by the drive. If the off-line data collection capability is 0, it indicates that off-line data collection is not supported. Table 5.15 Off-line data collection capability If this bit is 1, it indicates that the SMART EXECUTE OFF- LINE IMMEDATE sub-command (Features field = D4h) is supported.
Page 138: Table 5.18 Log Directory Data Format
Interface • Checksum Two’s complement of the lower byte, obtained by adding 511-byte data one byte at a time from the beginning. • Guarantee failure threshold The limit of a varying attribute value. The host compares the attribute values with the thresholds to identify a failure. Table 5.18 Log Directory Data Format Byte SMART Logging Version...
Page 139: Table 5.19 Data Format Of Smart Summary Error Log
Table 5.19 Data format of SMART Summary Error Log (1/2) Byte Version of this function Pointer for the latest “Error Log Data Structure” 02 to 0D 0E to 19 1A to 25 26 to 31 Error log data structure 3A to 3D 46 to 58 5A, 5B C141-E224...
Page 140 Interface Table 5.19 Data format of SMART Summary Error Log (2/2) Byte 5C to 1C3 1C4, 1C5 Total number of drive errors 1C6 to 1FE Reserved Check sum • Command data structure Indicates the command received when an error occurs. •...
Page 141: Table 5.20 Data Format Of Smart Comprehensive Error Log
Table 5.20 Data format of SMART Comprehensive Error Log Byte SMART Error Logging 01h Index Pointer Latest Error Data Structure 02…5B Error Log Data Structure 5C…B5 Error Log Data Structure2 B6…10F Error Log Data Structure3 110…169 Error Log Data Structure4 16A…1C3 Error Log Data Structure5 1C4…1C5...
Page 142: Table 5.21 Smart Self-Test Log Data Format
Interface Table 5.21 SMART self-test log data format Byte 00, 01 Self-test log data structure Self-test log 1 04, 05 07 to 0A 0B to 19 1A to 1F9 Self-test log 2 to 21 1FA, 1FB Vendor unique Self-test index 1FD, 1FE Reserved Check sum...
Page 143: Table 5.22 Selective Self-Test Log Data Structure
Table 5.22 Selective self-test log data structure Byte 00h, 01h Data Structure Revision Number 02h...09h Test Span 1 0Ah...11h 12h...19h Test Span 2 1Ah...21h 22h...29h Test Span 3 2Ah...31h 32h...39h Test Span 4 3Ah...41h 42h...49h Test Span 5 4Ah...51h 52h...151h Reserved 152h...1EBh Vender Unique...
Page 144: Table 5.23 Selective Self-Test Feature Flags
Interface • Current Span under test As the self-test progress, the device shall modify this value to contain the test span number currently being tested. • Feature Flags Table 5.23 Selective self-test feature flags Vendor specific (unused) When set to one, perform off-line scan after selective test Vendor specific (unused) When set to one, off-line scan after selective test is pending.
Page 145: Device Configuration (X'b1')
(17) DEVICE CONFIGURATION (X'B1') Individual Device Configuration Overlay feature sub commands are identified by the value placed in the Features field. The following table shows these Features field values. If this command sets with the reserved value of Features field, an aborted command error is posted.
Page 146 Interface • DEVICE CONFIGURATION RESTORE (Features Field = C0h) The DEVICE CONFIGURATION RESTORE command disables any setting previously made by a DEVICE CONFIGURATION SET command and returns the content of the IDENTIFY DEVICE command response to the original settings as indicated by the data returned from the execution of a DEVICE CONFIGURATION IDENTIFY command.
Page 147 • DEVICE CONFIGURATION IDENTIFY (Features Field = C2h) The DEVICE CONFIGURATION IDENTIFY command returns information shown in Table 5.24. The content of this data structure indicates the selectable commands, modes, and feature sets that the device is capable of supporting. If a DEVICE CONFIGURATION SET command has been issued reducing the capabilities, the response to an IDENTIFY DEVICE command will reflect the reduced set of capabilities, however, the DEVICE CONFIGURATION...
Page 148: Table 5.24 Device Configuration Identify Data Structure
Interface Table 5.24 DEVICE CONFIGURATION IDENTIFY data structure (1/2) Word Value X'0002' Data structure revision X'0007' Multiword DMA modes supported Reflected in IDENTIFY information "WORD63". Bits 15-3: Bit 2: Bit 1: Bit 0: X'003F' Ultra DMA modes supported Reflected in IDENTIFY information "WORD88". Bits 15-6: Bit 5: Bit 4:...
Page 149 Table 5.24 DEVICE CONFIGURATION IDENTIFY data structure (2/2) Word Value X ' 0015 ' Serial-ATA command set/function → Reflected in IDENTIFY information ”Word 76 to 79. Bits 15-5: Bit 4: Bit 3: Bit 2: Bit 1: Bit 0: X ' 0000 ' Reserved for Serial-ATA 10 to 254 X'0000'...
Page 150: Read Multiple (X'c4')
Interface (18) READ MULTIPLE (X’C4’) The READ MULTIPLE command performs the same tasks as the READ SECTOR(S) command except that this command sends the PIO Setup FIS before sending data blocks of multiple sectors. The PIO Setup FIS is sent only before the first data block is transferred, and it is not sent before any subsequent transfer of sector blocks.
Page 151: Figure 5.10 Execution Example Of Read Multiple Command
Host Figure 5.10 Execution example of READ MULTIPLE command • Error reporting conditions (1) A specified address exceeds the range where read operations are allowed (ST = 51h, ER = 10h). (2) The range where read operations are allowed will be exceeded by an address during a read operation (ST = 51h, ER = 10h).
Page 152 Interface At command issuance (Shadow Block Registers setting contents) At command completion (Shadow Block Registers contents to be read) *1 If the command is completed normally, the number of remaining sectors is set in this field. If the command is terminated because of an error, the number of sectors for which data has not been transferred is set in the field.
Page 153: Write Multiple (X'c5')
(19) WRITE MULTIPLE (X’C5’) The WRITE MULTIPLE command performs the same tasks as the WRITE SECTOR(S) command except that this command sends the PIO Setup FIS before sending data blocks of multiple sectors. The PIO Setup FIS is sent only before the first data block is transferred, and it is not sent before any subsequent transfer of sector blocks.
Page 154 Interface At command issuance (Shadow Block Registers setting contents) (R: Retry) At command completion (Shadow Block Registers contents to be read) *1 If the command was terminated because of an error, the number of sectors for which data has not been written is set in this field. 5-78 HD No.
Page 155: Set Multiple Mode (X'c6')
(20) SET MULTIPLE MODE (X’C6’) This command enables the device to perform the READ MULTIPLE and WRITE MULTIPLE commands. The block count (number of sectors in a block) for these commands are also specified by the SET MULTIPLE MODE command. The number of sectors per block is written into the Sector Count field.
Page 156 Interface At command completion (Shadow Block Registers contents to be read) 5-80 Status information Sector count/block Error information C141-E224...
Page 157: Read Dma (X'c8' Or X'c9')
(21) READ DMA (X’C8’ or X’C9’) The READ DMA command reads data from sectors, starting from the sectors specified in the Device/Head, Cylinder High, Cylinder Low, and Sector Number fields and continuing for as many sectors as specified in the Sector Count field. A value ranging from 1 to 256 can be specified for the number of sectors.
Page 158 Interface At command issuance (Shadow Block Registers setting contents) At command completion (Shadow Block Registers contents to be read) *1 If the command is terminated due to an error, the remaining number of sectors of which data was not transferred is set in this register.
Page 159: Write Dma (X'ca' Or X'cb')
(22) WRITE DMA (X’CA’ or X’CB’) The WRITE DMA command writes data to sectors starting from the sectors specified in the Device/Head, Cylinder High, Cylinder Low, and Sector Number fields and continuing for as many sectors as specified in the Sector Count field. A value ranging from 1 to 256 can be specified for the number of the sectors.
Page 160 Interface At command issuance (Shadow Block Registers setting contents) At command completion (Shadow Block Registers contents to be read) *1 If the command was terminated because of an error, the number of sectors for which data has not been written is set in this field. 5-84 HD No.
Page 161: Read Buffer (X'e4')
(23) READ BUFFER (X’E4’) The host system can read the current contents of the data buffer of the device by issuing this command. Upon receipt of this command, the device transfers the PIO Setup. After that, the host system can read up to 512 bytes of data from the buffer. •...
Page 162: Flush Cache (X'e7')
Interface (24) FLUSH CACHE (X’E7’) This command is used to write every write cache data stored by the device into the medium. When the device completes all the data writing, it reports the status to the host system. The device performs every error recovery so that the data are read correctly.
Page 163: Write Buffer (X'e8')
(25) WRITE BUFFER (X’E8’) The host system can overwrite the contents of the data buffer of the device with a desired data pattern by issuing this command. Upon receipt of this command, the device transfers the PIO Setup. After that, 512 bytes of data is transferred from the host and the device writes the data to the buffer, then reports the status .
Page 164: Identify Device (X'ec')
Interface (26) IDENTIFY DEVICE (X’EC’) The host system issues the IDENTIFY DEVICE command to read parameter information from the device. When it receives the command, the device prepares the parameter information to be sent to the host. Next, the device sends the PIO Setup FIS to the host, then sends the parameter information including a 512-byte date.
Page 165: Identify Device Dma (X'ee')
(27) IDENTIFY DEVICE DMA (X’EE’) When this command is not used to transfer data to the host in DMA mode, this command functions in the same way as the Identify Device command. • Error reporting conditions (1) A SATA communication error occurred (ST = 51h, ER = 0Ch). At command issuance (Shadow Block Registers setting contents) At command completion (Shadow Block Registers contents to be read) C141-E224...
Page 166: Table 5.25 Information To Be Read By Identify Device Command
Interface Table 5.25 Information to be read by IDENTIFY DEVICE command (1/3) Word Value X’045A’ General Configuration X’3FFF’ Number of Logical cylinders X’C837’ Detailed Configuration X’0010’ Number of Logical Heads X’0000’ Undefined X’003F’ Number of Logical sectors per Logical track X’0000’...
Page 167 Table 5.25 Information to be read by IDENTIFY DEVICE command (2/3) Word Value X’0078’ Minimum multiword DMA transfer cycle time per word: 120 [ns] X’0078’ Manufacturer’s recommended DMA transfer cycle time: 120 [ns] X’00F0’ Minimum PIO transfer cycle time without IORDY flow control: 240 [ns] X’0078’...
Page 168 X' 10 ' X ' 10 ' X ' 3F ' X ' 950F8B0 ' X ' 6FC7C80 ' MHV2040BH X ' 3FFF ' X ' 3FFF ' X ' 10 ' X ' 10 ' X ' 3F '...
Page 169 8C73h The device requires the SET FEATURES sub-command after the power-on sequence in order to spin-up. The Identify information is incomplete. C837h The device requires the SET FEATURES sub-command after the power-on sequence in order to spin-up. The Identify information is incomplete.
Page 170 Interface *8 Word 59: Transfer sector count currently set by READ/WRITE MULTIPLE command Bits 15-9: Reserved Bit 8: '1' = Enable the multiple sector transfer Bits 7-0: Transfer sector count currently set by READ/WRITE MULTIPLE command without interrupt supports 2, 4, 8 and 16 sectors. *9 Word 63: Multiword DMA transfer mode Bits 15-11: Reserved Bit 10:...
Page 171 *13 WORD 78 Bits 15-7: Reserved Bit 6: '1' = Supports the software settings preservation. Bit 5: Reserved Bit 4: '1'= Supports the in-order data delivery. Bit 3: '1'= Supports the Power Management initiation from the device to Bit 2: '1' = Supports the DMA Setup FIS Auto-Activate optimization.
Page 172 Interface *16 WORD 82 Bit 15: Undefined Bit 14: '1' = Supports the NOP command. Bit 13: '1' = Supports the READ BUFFER command. Bit 12: '1' = Supports the WRITE BUFFER command. Bit 11: Undefined Bit 10: '1' = Supports the Host Protected Area feature set. Bit 9: '1' = Supports the DEVICE RESET command.
Page 173 Bit 4: Bit 3: Bit 2: Bit 1: Bit 0: *: Option (customizing) *18 WORD 84 Bit 15: = 0 The device always returns the fixed value indicated on the left. Bit 14: = 1 The device always returns the fixed value indicated on the left. Bit 13: '1' = Support the Unload Immediate command.
Page 174 Interface Bit 6: '1' = Enables the read cache function. From the SET FEATURES Bit 5: '1' = Enables the write cache function. Bit 4: '1' = Enables the P PACKET command set. Bit 3: '1' = Supports the Power Management function. Bit 2: '1' = Supports the Removable Media function.
Page 175 Bit 0: '1' = Supports the Mode 0 *23 WORD 89 MHV2100BH= X'32': 100 minutes MHV2080BH = X'28': 80 minutes MHV2060BH = X'1E': 60 minutes MHV2040BH = X'14': 40 minutes *24 WORD 94 Bits 15-8: X'FE' Recommended acoustic management value. Bits 7-0: X'XX' Current set value.
Page 176 Interface Bit 4: '1' = Security counter expired Bit 3: '1' = Security frozen Bit 2: '1' = Security locked Bit 1: '1' = Security enabled Bit 0: '1' = Security supported 5-100 C141-E224...
Page 177: Set Features (X'ef')
(28) SET FEATURES (X’EF’) The host system issues the SET FEATURES command to set parameters in the Features field for the purpose of changing the device features to be executed. Upon receipt of this command, the device sets the parameters in the Features field, then reports the status to the host system.
Page 178 Interface Table 5.26 Features field values and settable modes (2/2) Features Field X ' AA ' Enables the read cache function. Specifies the transfer of 4-byte ECC for READ LONG and WRITE LONG X ' BB ' commands. (Note) X ' C2 ' Disables the Acoustic management function.
Page 179 At command completion (Shadow Block Registers contents to be read) Data Transfer Mode The host sets X’03’ to the Features field. By issuing this command with setting a value to the Sector Count field, the transfer mode can be selected. Upper 5 bits of the Sector Count register defines the transfer type and lower 3 bits specifies the binary mode value.
Page 180 Interface Transfer mode • Multiword DMA transfer mode X • Ultra DMA transfer mode X Advanced Power Management (APM) The host writes the Sector Count field with the desired power management level and executes this command with the Features field X’05’, and then Advanced Power Management is enabled.
Page 181 Serial ATA Functions The host can enable and disable the following Serial ATA functions by issuing this command after setting X'10/90' in the Features field and an applicable value in the Sector Count field: Serial ATA function Non-zero buffer offset in DMA Setup FIS DMA Setup FIS Auto-Activate optimization Device-initiated interface power state Transitions Guaranteed In-Order Data Delivery...
Page 182: Security Set Password (X'f1')
Interface (29) SECURITY SET PASSWORD (X’F1’) This command enables a user password or master password to be set. The host transfers the 512-byte data shown in Table 5.27 to the device. The device determines the operation of the lock function according to the specifications of the Identifier bit and Security level bit in the transferred data.
Page 183 • Error reporting conditions (1) The device is in Security Locked mode (ST = 51h, ER = 04h). (2) The device is in Security Frozen mode (ST = 51h, ER = 04h). (3) A SATA communication error occurred (ST = 51h, ER = 14h). At command issuance (Shadow Block Registers setting contents) At command completion (Shadow Block Register contents to be read) C141-E224...
Page 184: Security Unlock(X'f2')
Interface (30) SECURITY UNLOCK(X’F2’) This command cancels LOCKED MODE. The host transfers the 512-byte data shown in Table 5.29 to the device. Operation of the device varies as follows depending on whether the host specifies the master password. • When the master password is selected When the security level is LOCKED MODE is high, the password is compared with the master password already set.
Page 185 At command completion (Shadow Block Register contents to be read) C141-E224 Status information Error information 5.3 Host Commands 5-109...
Page 186: Security Erase Prepare (X'f3')
Interface (31) SECURITY ERASE PREPARE (X’F3’) The SECURITY ERASE UNIT command feature is enabled by issuing the SECURITY ERASE PREPARE command and then the SECURITY ERASE UNIT command. The SECURITY ERASE PREPARE command prevents data from being erased unnecessarily by the SECURITY ERASE UNIT command. •...
Page 187: Security Erase Unit (X'f4')
(32) SECURITY ERASE UNIT (X’F4’) This command erases all user data. This command also invalidates the user password and releases the lock function. The host transfers the 512-byte data shown in Table 5.29 to the device. The device compares the user password or master password in the transferred data with the user password or master password already set.
Page 188: Security Freeze Lock (X'f5')
Interface (33) SECURITY FREEZE LOCK (X’F5’) This command puts the device into FROZEN MODE. The following commands used to change the lock function return the Aborted Command error if the device is in FROZEN MODE. • SECURITY SET PASSWORD • SECURITY UNLOCK •...
Page 189 • WRITE MULTIPLE FUA EXT • WRITE DMA FUA EXT • READ FP DMA QUEUED • WRITE FP DMA QUEUED • Error reporting conditions (1) The device is in Security Locked mode (ST = 51h, ER = 04h). (2) A SATA communication error occurred (ST = 51h, ER = 14h). At command issuance (Shadow Block Registers setting contents) At command completion (Shadow Block Registers contents to be read) C141-E224...
Page 190: Security Disable Password (X'f6')
Interface (34) SECURITY DISABLE PASSWORD (X’F6’) This command invalidates the user password already set and releases the lock function. The host transfers the 512-byte data shown in Table 5.29 to the device. The device compares the user password or master password in the transferred data with the user password or master password already set, and releases the lock function if the passwords are the same.
Page 191 • Error reporting conditions (1) An incorrect password is specified (ST = 51h, ER = 04h). (2) The device is in Security Locked mode (ST = 51h, ER = 04h). (3) The device is in Security Frozen mode (ST = 51h, ER = 04h). (4) A SATA communication error occurred (ST = 51h, ER = 14h).
Page 192: Read Native Max Address (X'f8')
Interface (35) READ NATIVE MAX ADDRESS (X’F8’) This command posts the maximum address intrinsic to the device, which can be set by the SET MAX ADDRESS command. Upon receipt of this command, the device indicates the maximum address in the DH, CH, CL and SN field. Then reports the status to the host system.
Page 193: Set Max (X'f9')
(36) SET MAX (X’F9’) SET MAX Features Register Values Value 05h - FFh • SET MAX ADDRESS A successful READ NATIVE MAX ADDRESS command shall immediately precede a SET MAX ADDRESS command. This command allows the maximum address accessible by the user to be set in LBA or CHS mode.
Page 194 Interface • Error reporting conditions (1) The command has been issued more than twice (ST = 51h, ER = 10h). (2) The READ NATIVE MAX ADDRESS command has not been issued prior to the SET MAX ADDRESS command. (ST = 51h, ER = 04h). (3) The SET MAX ADDRESS (EXT) command has been issued (ST = 51h, ER = 04h).
Page 195 • Error reporting conditions (1) The device is in Set Max Locked mode or Set Max Freeze Locked mode (ST = 51h, ER =04h). (2) A SATA communication error occurred (ST = 51h, ER = 14h). At command issuance (Shadow Block Registers setting contents) At command completion (Shadow Block Registers contents to be read) Words 1 to 16...
Page 196 Interface • SET MAX LOCK (Features Field = 02h) The SET MAX LOCK command sets the device into SET_MAX_LOCK state. After this command is completed, any other SET MAX commands except SET MAX UNLOCK and SET MAX FREEZE LOCK commands are rejected. And the device returns command aborted.
Page 197 • SET MAX UNLOCK (Features Field = 03h) This command requests a transfer of single sector of data from the host, and defines the contents of SET MAX ADDRESS password. The password supplied in the sector of data transferred shall be compared with the stored password.
Page 198 Interface • SET MAX FREEZE LOCK (Features Field = 04h) The Set MAX FREEZE LOCK command sets the device to SET_MAX_Frozen state. After the device made a transition to the Set Max Freeze Lock state, the following SET MAX commands are rejected, then the device returns command aborted: −...
Page 199: Read Sector (S) Ext (X'24')
(37) READ SECTOR (S) EXT (X’24’) • Description This command is the extended command of the READ SECTOR (S) command. The LBA specification is increased from 28 bits to 48 bits, and the maximum number of sectors that can be transferred by a single command is changed from 100h to 10000h.
Page 200: Read Dma Ext (X'25')
Interface (38) READ DMA EXT (X’25’) • Description This command is the extended command of the READ DMA command. The LBA specification is increased from 28 bits to 48 bits, and the maximum number of sectors that can be transferred by a single command is changed from 100h to 10000h.
Page 201: Read Native Max Address Ext (X'27')
(39) READ NATIVE MAX ADDRESS EXT (X’27’) • Description This command is used to assign the highest address that the device can initially set with the SET MAX ADDRESS EXT command. The maximum address is displayed in the CH(EXP), CL(EXP), SN(EXP) filed of the device shadow block registers.
Page 202: Read Multiple Ext (X'29')
Interface (40) READ MULTIPLE EXT (X’29’) • Description This command is the extended command of the READ MULTIPLE command. The LBA specification is increased from 28 bits to 48 bits, and the maximum number of sectors that can be transferred by a single command is changed from 100h to 10000h.
Page 203: Read Log Ext (X'2F')
(41) READ LOG EXT (X'2F') The READ LOG EXTEND command reads versatile log data. Versatile log data includes the Extended SMART Comprehensive Error log, the Extended SMART Self-test log, and the SMART Selective log. The effectiveness of the log types depends on customization.
Page 204 Interface At command issuance (Shadow Block Registers setting contents) CH EXP CL EXP SN EXP SC EXP FR EXP At command completion (Shadow Block Registers contents to be read) CH EXP CL EXP SN EXP SC EXP 5-128 Sector offset (15-8) Sector offset (7-0) Log address Sector count (15-8)
Page 205: Table 5.30 Data Format Of Read Log Ext Log Page 10H
Table 5.30 Data format of Read Log Ext log page 10h Byte Tag field Reserved Status field value Error field value Sector Number field value Cylinder Low field value Cylinder High field value Dev/Head field value Sector Number Exp field value Cylinder Low Exp field value Cylinder High Exp field value Reserved...
Page 206: Table 5.32 Data Format Of Read Log Ext Log Page 11H
Interface Table 5.32 Data format of Read Log Ext log page 11h Byte 00 to 03 Reserved 04 to 05 Counter 1 Identifier 06 to 09 Counter 1 Value 0A to 0B Counter 2 Identifier 0C to 0F Counter 2 Value …...
Page 207: Write Sector (S) Ext (X'34')
(42) WRITE SECTOR (S) EXT (X’34’) • Description This command is the extended command of the WRITE SECTOR (S) command. The LBA specification is increased from 28 bits to 48 bits, and the maximum number of sectors that can be transferred by a single command is changed from 100h to 10000h.
Page 208: Write Dma Ext (X'35')
Interface (43) WRITE DMA EXT (X’35’) • Description This command is the extended command of the WRITE DMA command. The LBA specification is increased from 28 bits to 48 bits, and the maximum number of sectors that can be transferred by a single command is changed from 100h to 10000h.
Page 209: Set Max Address Ext (X'37')
(44) SET MAX ADDRESS EXT (X’37’) • Description This command limits specifications so that the highest address that can be accessed by users can be specified only in LBA mode. The address information specified with this command is set in words 1, 54, 57, 58, 60, 61, and 100 to 103 of the IDENTIFY DEVICE command response.
Page 210 Interface At command issuance (Shadow Block Registers setting contents) CH EXP CL EXP SN EXP SC EXP FR EXP At command completion (Shadow Block Registers contents to be read) CH EXP CL EXP SN EXP SC EXP 5-134 SET MAX LBA (47-40) SET MAX LBA (23-16) SET MAX LBA (39-32) SET MAX LBA (15-8)
Page 211: Write Multiple Ext (X'39')
(45) WRITE MULTIPLE EXT (X’39’) • Description This command is the extended command of the WRITE MULTIPLE command. The LBA specification is increased from 28 bits to 48 bits, and the maximum number of sectors that can be transferred by a single command is changed from 100h to 10000h.
Page 212: Write Log Ext (X'3F')
Interface (46) WRITE LOG EXT (X'3F') The WRITE LOG EXTEND command writes versatile log data. Versatile log data includes the Extended SMART Comprehensive Error log, the Extended SMART Self-test log, and the SMART Selective log; and each log can be partially written with this command.
Page 213 At command issuance (Shadow Block Registers setting contents) CH EXP CL EXP SN EXP SC EXP FR EXP At command completion (Shadow Block Registers contents to be read) CH EXP CL EXP SN EXP SC EXP C141-E224 Sector offset (15-8) Sector offset (7-0) Log address Sector count (15-8)
Page 214: Read Verify Sector (S) Ext (X'42')
Interface (47) READ VERIFY SECTOR (S) EXT (X’42’) • Description This command is the extended command of the READ VERIFY SECTOR (S) command. The LBA specification is increased from 28 bits to 48 bits, and the maximum number of sectors that can be transferred by a single command is changed from 100h to 10000h.
Page 215: Flush Cache Ext (X'ea')
(48) FLUSH CACHE EXT (X’EA’) • Description This command executes the same operations as the FLUSH CACHE command (E7h). However, only LBA=1 can be specified in the command. • Error reporting conditions (1) A SATA communication error occurred (ST = 51h, ER = 14h). At command issuance (Shadow Block Registers setting contents) CH EXP CL EXP...
Page 216: Write Multiple Fua Ext (X'ce')
Interface (49) WRITE MULTIPLE FUA EXT (X'CE') • Description The WRITE MULTIPLE FUA EXT command reports the status of a command after user data is written to a medium, regardless of whether the write cache feature is enabled or disabled. The other command control and error reporting conditions are the same as those of the WRITE MULTIPLE EXT command.
Page 217: Write Dma Fua Ext (X'3D')
(50) WRITE DMA FUA EXT (X'3D') • Description The WRITE DMA FUA EXT command reports the status of a command after user data is written to a medium, regardless of whether the write cache feature is enabled or disabled. The other command control and error reporting conditions are the same as those of the WRITE DMA EXT command.
Page 218: Read Fp Dma Queued (X'60')
Interface (51) READ FP DMA QUEUED (X'60') • Description For details about control of the READ FP DMA QUEUED command, see Section 5.4.6. At command issuance (Shadow Block Registers setting contents) CH EXP CL EXP SN EXP SC EXP FR EXP At command completion (Shadow Block Registers contents to be read) CH EXP CL EXP...
Page 219: Write Fp Dma Queued (X'61')
(52) WRITE FP DMA QUEUED (X'61') • Description For details about control of the WRITE FP DMA QUEUED command, see Section 5.4.6. At command issuance (Shadow Block Registers setting contents) CH EXP CL EXP SN EXP SC EXP FR EXP At command completion (Shadow Block Registers contents to be read) CH EXP CL EXP...
Page 220: Error Posting
Interface 5.3.3 Error posting Table 5.34 lists the defined errors that are valid for each command. Table 5.34 Command code and parameters (1/2) COMMAND NAME RECALIBRATE READ SECTOR(S) WRITE SECTOR(S) WRITE VERIFY READ VERIFY SECTOR(S) SEEK EXECUTE DEVICE DIAGNOSTIC INITIALIZE DEVICE PARAMETERS DOWNLOAD MICROCODE STANDBY IMMEDIATE...
Page 221 Table 5.34 Command code and parameters (2/2) COMMAND NAME SECURITY UNLOCK SECURITY ERASE PREPARE SECURITY ERASE UNIT SECURITY FREEZE LOCK SECURITY DISABLE PASSWORD READ NATIVE MAX ADDRESS SET MAX READ SECTOR(S) EXT READ DMA EXT READ NATIVE MAX ADDRESS EXT READ MULTIPLE EXT WRITE LOG EXT WRITE SECTOR(S) EXT...
Page 222: Command Protocol
Interface 5.4 Command Protocol The host should confirm that the BSY bit of the Shadow Block Status register of the device is 0 prior to issue a command. If BSY bit is 1, the host should wait for issuing a command until BSY bit is cleared to 0. Commands can be executed only when the DRDY bit of the Status register is 1.
Page 223: Figure 5.11 Non-Data Command Protocol
• READ NATIVE MAX ADDRESS (EXT) • IDLE • IDLE IMMEDIATE • STANDBY • STANDBY IMMEDIATE • CHECK POWER MODE • SMART DISABLE OPERATION • SMART ENABLE/DISABLE AUTOSAVE • SMART ENABLE OPERATION • SMART EXECUTE OFFLINE IMMEDIATE • SMART RETURN STATUS •...
Page 224: Pio Data-In Command Protocol
Interface 5.4.2 PIO data-in command protocol Execution of the following commands involves data transfers from the device to the host system: • IDENTIFY DEVICE • READ SECTOR(S) (EXT) • READ MULTI (EXT) • READ BUFFER • SMART READ DATA • SMATR READ LOG SECTOR •...
Page 225: Pio Data-Out Command Protocol
Host Figure 5.12 PIO data-in command protocol 5.4.3 PIO data-out command protocol Execution of the following commands involves data transfers from the host system to the device: • WRITE SECTOR(S) (EXT) • WRITE MULTI (EXT) (FUA EXT) • WRITE BUFFER •...
Page 226: Figure 5.13 Pio Data-Out Command Protocol
Interface An outline of this protocol is as follows: 1) The device receives a PIO data-out command with the RegHD FIS. 2) If an error remaining in the device prevents command execution, the device sends the RegDH FIS with 1 set in the I bit. 3) When the device is ready to receive data, it sets 0 in the BSY bit and 1 in the DRQ bit of the Status field of the PIO Setup FIS.
Page 227: Dma Data-In Command Protocol
5.4.4 DMA data-in command protocol DMA data-in commands include the following commands: • READ DMA (EXT) • IDENTFY DEVICE • IDENTFY DEVICE DMA The DMA mechanism transfers data of more than one block from the device to the host. The completion of a command is reported by an interruption. An outline of this protocol is as follows: 1) The device receives a DMA data-in command with the RegHD FIS.
Page 228: Dma Data-Out Command Protocol
Interface 5.4.5 DMA data-out command protocol The DMA data-out command is the following command: • WRITE DMA (EXT) (FUA EXT) The DMA mechanism transfers data of more than one block from the host to the device. The completion of the command is reported by an interruption. An outline of this protocol is as follows: 1) The device receives the DMA data-out command with the RegHD FIS.
Page 229: Native Command Queuing Protocol
5.4.6 Native Command Queuing protocol Native Queued commands include the following commands: READ FP DMA QUEUED WRITE FP DMA QUEUED An outline of the command queuing protocol is as follows: 1) After the device receives a Native Queued command, if the command is executable, the device sends to the host the RegDH FIS with the settings of I bit = 0, BSY bit = 0, and DRQ bit = 0, and it places the command in the command queue.
Page 230: Figure 5.16 Read Fp Dma Queued Command Protocol
Interface 8) If an uncorrectable error occurs during command queuing, the device sends to the host the Set Device Bits FIS with the settings of ERR bit = 1, ERRReg = ATAErrCode, I bit = 1, and SActive = 0 to report an error. 9) After reporting the error, the device accepts only the READ LOG EXT command with page 10h specified and the reset requests (SoftReset and COMRESET).
Page 231: Figure 5.17 Write Fp Dma Queued Command Protocol
5.4 Command Protocol RegHD Host Device RegDH DMA Setup DMACT DATA SetDB Figure 5.17 WRITE FP DMA QUEUED command protocol C141-E224 5-155...
Page 232: Power-On And Comreset
Interface 5.5 Power-on and COMRESET Figure 5.18 shows the power-on sequence, and Figure 5.19 shows the COMRESET sequence. Immediately after power-on or COMRESET, the host sets 0x7Fh in the Status field of the Shadow Block Register and 0xFFh in other fields. After the power-on sequence shown below and after communication with the SATA interface is established, the host sets 0xFFh in the Status field of the Shadow Block Register.
Page 233: Figure 5.19 Comreset Sequence
5.5 Power-on and COMRESET Host Host releases Host/device releases Host Host ComReset calibrate ComWake Align Host Host Host ComReset ComWake data Host TX (Device RX) Device TX (Host RX) Device Device Device ComInit ComWake data Device Device Device releases Calibrate Align ComInit Figure 5.19 COMRESET sequence...
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Page 235: Chapter 6 Operations
CHAPTER 6 Operations Reset and Diagnosis Power Save Interface Power Save Read-ahead Cache Write Cache This chapter explains each of the above operations. C141-E224...
Page 236: Reset And Diagnosis
Operations 6.1 Reset and Diagnosis This section explains the device responses to power-on and an accepted reset. 6.1.1 Response to power-on Immediately after power is turned on, the host sets 0x7Fh in the Status field of the Shadow Block and 0xFFh in other fields. After communication with the SATA interface is established, the host sets 0xFFh in the Status field of the Shadow Block.
Page 237: Figure 6.2 Response To Power-On (When The Device Is Powered On Earlier Than The Host)
6.1 Reset and Diagnosis Figure 6.2 Response to power-on (when the device is powered on earlier than the host) C141-E224...
Page 238: Response To Comreset
Operations 6.1.2 Response to COMRESET The response to COMRESET is almost the same as the response when power is turned on and a power-on reset is then cancelled. The device establishes communication with the SATA interface (PHY Ready) and sends the RegDH FIS (STS = 50h) to notify the host that the device is ready.
Page 239: Software Settings Preservation
6.1.2.1 Software settings preservation When a device is enumerated, software will configure the device using SET FEATURES and other commands. These software settings are often preserved across software reset but not necessarily across hardware reset. In Parallel ATA, only commanded hardware resets can occur, thus legacy software only reprograms settings that are cleared for the particular type of reset it has issued.
Page 240 Operations • SET ADDRESS MAX (EXT) The maximum LBA specified in SET MAX ADDRESS or SET MAX ADDRESS EXT. • SET FEATURES (Write Cache Enable/Disable) The write cache enable/disable setting established by the SET FEATURES command with subcommand code of 02h or 82h. •...
Page 241: Response To A Software Reset
6.1.3 Response to a software reset When a software reset is accepted, the device performs a self-diagnosis, and it sends the RegDH FIS (STS = 50h) to notify the host that the device is ready. Then, the software reset sequence is completed. Figure 6.4 Response to a software reset C141-E224 6.1 Reset and Diagnosis...
Page 242: Power Save
Operations 6.2 Power Save The host can change the power consumption state of the device by issuing a power command to the device. 6.2.1 Power save mode There are five types of power consumption state of the device including active mode where all circuits are active.
Page 243 • Upon receipt of a COMRESET • Upon receipt of Idle/Idle Intermediate (4) Standby mode In this mode, the spindle motor has stopped from the low power idle state. The device can receive commands through the interface. However if a command with disk access is issued, response time to the command under the standby mode takes longer than the active, active idle, or low power idle mode because the access to the disk medium cannot be made immediately.
Page 244: Power Commands
Operations 6.2.2 Power commands The following commands are available as power commands. • IDLE • IDLE IMMEDIATE • STANDBY • STANDBY IMMEDIATE • SLEEP • CHECK POWER MODE • SET FEATURES (APM setting) 6-10 C141-E224...
Page 245: Power Save Controlled By Interface Power Management (Ipm)
6.3 Power Save Controlled by Interface Power Management (IPM) 6.3 Power Save Controlled by Interface Power Management (IPM) The host system can change the power consumption status of the interface by issuing the PARTIAL or SLUMBER request to the device. 6.3.1 Power save mode of the interface The interface power consumption states of this device can be separated into the following three modes, including the Active mode where the device is in the...
Page 246 Operations (3) Slumber mode In this mode, the (deep) Power Save mode is set for the interface circuit. The device switches to Slumber mode when the following occurs: • The device receives the PMREQ_P signal from the host and responds with the PMACK signal •...
Page 247: Read-Ahead Cache
6.4 Read-ahead Cache Read-ahead Cache is the function for automatically reading data blocks upon completion of the read command in order to read data from disk media and save data block on a data buffer. If a subsequent command requests reading of the read-ahead data, data on the data buffer can be transferred without accessing the disk media.
Page 248: Caching Operation
Operations 6.4.2 Caching operation The caching operation is performed only when the commands listed below are received. If any of the following data are stored on the data buffer, the data is sent to the host system. • All of the sector data that this command processes. •...
Page 249 (3) Invalidating caching-target data Data that is a target of caching on the data buffer is invalidated under the following conditions: 1)-1 Any command other than the following commands is issued. (All caching- target data is invalidated.) READ BUFFER WRITE BUFFER RECALIBRATE FORMAT TRACK SET FEATURES...
Page 250: Using The Read Segment Buffer
Operations 6.4.3 Using the read segment buffer Methods of using the read segment buffer are explained for following situations. 6.4.3.1 Miss-hit In this situations, the top block of read requested data is not stored at all in the data buffer. As a result, all of the read requested data is read from disk media. 1) HAP (host address pointer) and DAP (disk address pointer) are defined in the head of the segment allocated from Buffer.
Page 251: Sequential Hit
6.4.3.2 Sequential hit When the read command that is targeted at a sequential address is received after execution of the read commands is completed, the read command transmits the Read requested data to the host system continuing read-ahead without newly allocating the buffer for read.
Page 252 Operations data that is a target of caching and remains before a full hit, the data is retained when execution of the command is completed. This is done so that a new read- ahead operation is not performed. If the full hit command is received during the read-ahead operation, a transfer of the read requested data starts while the read- ahead operation is in progress.
Page 253: Partial Hit
6.4.3.4 Partial hit In this situation, a part of read requested data including the top sector is stored in the data buffer. A transfer of the read requested data starts from the address where the data that is hit is stored until the top sector of the read requested data. Remaining part of insufficient data is read then.
Page 254: Write Cache
Operations 6.5 Write Cache Write Cache is the function for reducing the command processing time by separating command control to disk media from write control to disk media. When Write Cache is permitted, the write command can be keep receiving as long as the space available for data transfers remains free on the data buffer.
Page 255 (3) Status report in the event of an error The status report concerning an error occurring during writing onto media is created when the next command is issued. Where the command reporting the error status is not executed, only the error status is reported. Only the status of an error that occurs during write processing is reported.
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Page 257: Glossary
Actuator Head positioning assembly. The actuator consists of a voice coil motor and head arm. If positions the read-write (R-W) head. AT bus A bus between the host CPU and adapter board ATA (AT Attachment) standard The ATA standard is for a PC AT interface regulated to establish compatibility between products manufactured by different vendors.
Page 258 Glossary Disk enclosure. The DE includes the disks, built-in spindle motor, actuator, heads, and air filter. The DE is sealed to protect these components from dust. Host receptacle Host receptacle is a connector type on the host system that the signal segment of Serial-ATA unifies with the power supply segment.
Page 259 Rotational delay Time delay due to disk rotation. The mean delay is the time required for half a disk rotation. The mean delay is the average time required for a head to reach a sector after the head is positioned on a track. Seek time The seek time is the time required for a head to move from the current track to another track.
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Page 261: Acronyms And Abbreviations
Acronyms and Abbreviations ABRT Aborted command Automatic idle control AMNF Address mark not found AT attachment American wire gage Bad block detected BIOS Basic input-output system CORR Corrected data Cylinder high register Cylinder low register Command register Current sense register Current start/stop Cylinder register dB A-scale weighting...
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Page 263 A/D converter circuit... 4-11 AAM... 5-105 acceleration mode... 4-20 acoustic noise ... 1-9 acoustic noise specification ... 1-9 active field ... 5-26 active idle mode... 6-8 active mode...6-8, 6-11 actuator ...2-2, 4-2 actuator motor control ... 4-19 adaptability ... 1-2 advanced power management...
Page 264 Index condition, installation ...3-1 configuration device ...2-1, 2-2 drive system ...2-3 system ...2-3 connection drive ...2-3 connection to SATA interface ...1-3 connection with host system...3-9 connector location...3-9 connector pinout ...5-10 connector specification host system...3-10 connector, device ...3-9 controller circuit ...2-3, 4-4 current and power dissipation...1-7 current attribute value...5-59 current fluctuation (Typ.) at +5 V...
Page 265 error logging capability ... 5-61 error posting ... 5-144 error rate ... 1-11 example of model name and product number ... 1-5 EXECUTE DEVICE DIAGNOSTIC... 5-41 execution example of READ MULTIPLE command... 5-75 execution timing of self-calibration... 4-8 failure prediction capability flag ... 5-61 feature...
Page 266 Index load/unload function ...1-11 location of breather ...3-5 location, connector...3-9 lock function, operation of...5-106 log directory data format ...5-62 logical interface ...5-14 low noise and vibration...1-3 low power idle mode ...6-8 master password ...5-108 mean time between failure (MTBF) ...1-10 mean time to repair (MTTR) ...1-10 measurement point, surface temperature ...3-6...
Page 267 READ FP DMA QUEUED command protocol ... 5-154 READ LOG EXT ... 5-127 READ LOG EXT log page 10h, data format of...5-129, 5-130 READ MULTIPLE ... 5-74 READ MULTIPLE command, execution example of ... 5-75 READ MULTIPLE EXT... 5-126 READ NATIVE MAX ADDRESS... 5-116 READ NATIVE MAX ADDRESS EXT...
Page 268 Index specification summary...1-4 spindle...4-2 spindle motor ...2-2 spindle motor control...4-20 spindle motor control circuit...4-14 spindle motor driver circuit ...4-3 stable rotation mode...4-20 staggered spin-up...5-11 standard value, surface temperature...3-6 STANDBY ...5-47 STANDBY IMMEDIAT ...5-45 standby mode...6-9 start mode ...4-20 status ...5-64 status after command execution...5-22 status field...5-25 status flag...5-59...
Page 269 We would appreciate your comments and suggestions regarding this manual. Manual code C141-E224-01EN Manual name MHV2100BH, MHV2080BH, MHV2060BH, MHV2040BH DISK DRIVES PRODUCT MANUAL Please mark each item: E(Excellent), G(Good), F(Fair), P(Poor). General appearance Technical level Organization Clarity Accuracy Comments & Suggestions List any errors or suggestions for improvement.
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Page 271 MHV2100BH, MHV2080BH, MHV2060BH, MHV2040BH DISK DRIVES C141-E224-01EN PRODUCT MANUAL MHV2100BH, MHV2080BH, MHV2060BH, MHV2040BH DISK DRIVES C141-E224-01EN PRODUCT MANUAL...
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Fujitsu MHV2040BH Product Manual

CHAPTER 1 Device Overview

CHAPTER 2 Device Configuration

CHAPTER 3 Installation Conditions

CHAPTER 4 Theory of Device Operation

CHAPTER 5 Interface

CHAPTER 6 Operations

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