NEC uPD31173 Manuals

Manuals and User Guides for NEC uPD31173. We have 1 NEC uPD31173 manual available for free PDF download: User Manual

NEC uPD31173 User Manual (413 pages)

Companion Chip

Brand: NEC | Category: Computer Hardware | Size: 2.29 MB

Table of Contents
10
Chapter 1 Overview

25
- Features
  25
- Ordering Information
  26
- Internal Block Configuration
  26
- PCI Device Configuration
  28
- Lists of Registers
  29
Chapter 2 Pin Functions

44
- Pin Configuration
  44
- Pin Function Lists
  50
- PCI Bus Interface Signals
  50
- USB Interface Signals
  50
- AC-Link Interface Signals
  50
- PC Card Interface Signals
  51
- Keyboard Interface Signals
  54
- PS/2 Interface Signals
  54
- Touch Panel Interface Signals
  55
- Audio Interface Signal
  55
- General-Purpose I/O Signals
  55
- Interrupt Interface Signal
  56
- Clock Interface Signals
  56
- Test Interface Signals
  56
- Power Supplies and Grounds
  57
- Pin Status and Recommended Connection Examples
  58
- Clock Oscillator Connection
  62
Chapter 3 Bcu (Bus Control Unit)

64
Chapter 4 Dmaau (Dma Address Unit)

75
- General
  75
- Register Set
  76
- AIU in DMA Base Address Registers
  77
- AIU in DMA Address Registers
  78
- AIU out DMA Base Address Registers
  79
- AIU out DMA Address Registers
  80
Chapter 5 Dcu (Dma Control Unit)

81
- General
  81
- DMA Priority Control
  81
- Register Set
  81
- DMARSTREG (Base Address + 0X020)
  82
- DMAIDLEREG (Base Address + 0X022)
  82
- DMASENREG (Base Address + 0X024)
  83
- DMAMSKREG (Base Address + 0X026)
  84
- DMAREQREG (Base Address + 0X028)
  85
Chapter 6 Cmu (Clock Mask Unit)

86
- General
  86
- Register Set
  87
- CMUCLKMSK (Base Address + 0X040)
  87
- CMUSRST (Base Address + 0X042)
  89
Chapter 7 Icu (Interrupt Control Unit)

90
- General
  90
- Register Set
  93
- SYSINT1REG (Base Address + 0X060)
  94
- PIUINTREG (Base Address + 0X062)
  96
- AIUINTREG (Base Address + 0X064)
  97
- KIUINTREG (Base Address + 0X066)
  98
- GIULINTREG (Base Address + 0X068)
  99
- GIUHINTREG (Base Address + 0X06A)
  99
- MSYSINT1REG (Base Address + 0X06C)
  100
- MPIUINTREG (Base Address + 0X06E)
  102
- MAIUINTREG (Base Address + 0X070)
  103
- MKIUINTREG (Base Address + 0X072)
  104
- MGIULINTREG (Base Address + 0X074)
  105
- MGIUHINTREG (Base Address + 0X076)
  105
- Notes for Register Setting
  106
Chapter 8 Giu (General-Purpose I/O Unit)

107
- General
  107
- Register Set
  108
- GIUDIRL (Base Address + 0X080)
  109
- GIUDIRH (Base Address + 0X082)
  110
- GIUPIODL (Base Address + 0X084)
  111
- GIUPIODH (Base Address + 0X086)
  112
- GIUINTSTATL (Base Address + 0X088)
  113
- GIUINTSTATH (Base Address + 0X08A)
  114
- GIUINTENL (Base Address + 0X08C)
  115
- GIUINTENH (Base Address + 0X08E)
  115
- GIUINTTYPL (Base Address + 0X090)
  116
- GIUINTTYPH (Base Address + 0X092)
  117
- GIUINTALSELL (Base Address + 0X094)
  118
- GIUINTALSELH (Base Address + 0X096)
  119
- GIUINTHTSELL (Base Address + 0X098)
  120
- GIUINTHTSELH (Base Address + 0X09A)
  121
- SELECTREG (Base Address + 0X09E)
  123
Chapter 9 Piu (Touch Panel Interface Unit)

125
Chapter 10 Aiu (Audio Interface Unit)

152
- General
  152
- Register Set
  152
- MDMADATREG (Base Address + 0X0E0)
  153
- SDMADATREG (Base Address + 0X0E2)
  153
- SODATREG (Base Address + 0X0E6)
  154
- SCNTREG (Base Address + 0X0E8)
  155
- SCNVRREG (Base Address + 0X0Ea)
  156
- MIDATREG (Base Address + 0X0F0)
  157
- MCNTREG (Base Address + 0X0F2)
  158
- MCNVRREG (Base Address + 0X0F4)
  159
- DVALIDREG (Base Address + 0X0F8)
  160
- SEQREG (Base Address + 0X0Fa)
  161
- INTREG (Base Address + 0X0Fc)
  162
- Operation Sequence
  163
- Output (Speaker)
  163
- Input (MIC)
  165
Chapter 11 Kiu (Keyboard Interface Unit)

166
- General
  166
- Register Set
  166
- Kiudatn (Base Address + 0X100 to Base Address + 0X10A)
  167
- KIUSCANREP (Base Address + 0X110)
  169
- KIUSCANS (Base Address + 0X112)
  171
- KIUWKS (Base Address + 0X114)
  173
- KIUWKI (Base Address + 0X116)
  175
- KIUINT (Base Address + 0X118)
  176
- KIURST (Base Address + 0X11A)
  177
- SCANLINE (Base Address + 0X11E)
  178
Chapter 12 Ps2U (Ps/2 Unit)

182
Chapter 13 Cardu1, Cardu2 (Pc Card Units)

187
Chapter 14 Usbu (Universal Serial Bus Unit)

274
- Features
  274
- USB Host Control Configuration Registers
  275
- Register Set
  276
- Command Register (Offset Address: 0X04)
  277
- Status Register (Offset Address: 0X06)
  278
- Base Address Register (Offset Address: 0X10)
  279
- Power Management Register (Offset Address: 0Xe0)
  280
- Operational Registers
  282
- Register Set
  282
- Hcrevision (Offset Address: 0X00)
  283
- Hccontrol (Offset Address: 0X04)
  284
- Hccommandstatus (Offset Address: 0X08)
  286
- Hcinterruptstatus (Offset Address: 0X0C)
  288
- Hcinterruptenable (Offset Address: 0X10)
  290
- Hcinterruptdisable (Offset Address: 0X14)
  292
- Hchcca (Offset Address: 0X18)
  294
- Hcperiodcurrented (Offset Address: 0X1C)
  295
- Hccontrolheaded (Offset Address: 0X20)
  296
- Hccontrolcurrented (Offset Address: 0X24)
  297
- Hcbulkheaded (Offset Address: 0X28)
  298
- Hcbulkcurrented (Offset Address: 0X2C)
  299
- Hcdonehead (Offset Address: 0X30)
  300
- Hcfminterval (Offset Address: 0X34)
  301
- Hcfmremaining (Offset Address: 0X38)
  302
- Hcfmnumber (Offset Address: 0X3C)
  303
- Hcperiodicstart (Offset Address: 0X40)
  304
- Hclsthreshold (Offset Address: 0X44)
  305
- Hcrhdescriptora (Offset Address: 0X48)
  306
- Hcrhdescriptorb (Offset Address: 0X4C)
  308
- Hcrhstatus (Offset Address: 0X50)
  310
- Hcrhportstatus1, 2 (Offset Address: 0X54, 0X58)
  312
- USB Specifications
  316
- General
  316
- Host Controller Communication Methods
  318
- ED (Endpoint Descriptor)
  321
- ED Format
  321
- ED Fields
  322
- TD (Transfer Descriptor)
  323
- Generaltd Format
  323
- Generaltd Fields
  324
- Isochronoustd Format
  326
- Isochronoustd Fields
  327
- HCCA (Host Controller Communication Area)
  327
- HCCA Format
  328
- HCCA Overview
  328
- HC State Transitions
  329
- List Service Flow
  330
Chapter 15 Ac97U (Ac97 Unit)

336
- General
  336
- Configuration Register Set
  336
- VID (Offset Address: 0X00 to 0X01)
  337
- DID (Offset Address: 0X02 to 0X03)
  337
- PCICMD (Offset Address: 0X04 to 0X05)
  338
- PCISTS (Offset Address: 0X06 to 0X07)
  339
- RID (Offset Address: 0X08)
  340
- CLASSC (Offset Address: 0X09 to 0X0B)
  340
- CACHELS (Offset Address: 0X0C)
  340
- MLT (Offset Address: 0X0D)
  341
- HEDT (Offset Address: 0X0E)
  341
- BIST (Offset Address: 0X0F)
  341
- BASEADR (Offset Address: 0X10 to 0X13)
  342
- SVID (Offset Address: 0X2C to 0X2D)
  343
- SUBID (Offset Address: 0X2E to 0X2F)
  343
- EXROMADR (Offset Address: 0X30 to 0X33)
  344
- INTL (Offset Address: 0X3C)
  344
- INTP (Offset Address: 0X3D)
  345
- MIN_GNT (Offset Address: 0X3E)
  345
- MAX_LAT (Offset Address: 0X3F)
  345
- Operational Register Set
  346
- INT_CLR/INT_STATUS (Offset Address: 0X00)
  347
- CODEC_WR (Offset Address: 0X04)
  349
- CODEC_RD (Offset Address: 0X08)
  350
- CODEC_REQ (Offset Address: 0X0C)
  351
- SLOT12_WR (Offset Address: 0X10)
  352
- SLOT12_RD (Offset Address: 0X14)
  353
- CTRL (Offset Address: 0X18)
  354
- ACLINK_CTRL (Offset Address: 0X1C)
  356
- SRC_RAM_DATA (Offset Address: 0X20)
  358
- INT_MASK (Offset Address: 0X24)
  359
- DAC1_CTRL (Offset Address: 0X30)
  361
- DAC1L (Offset Address: 0X34)
  362
- DAC1_BADDR (Offset Address: 0X38)
  363
- DAC2_CTRL (Offset Address: 0X3C)
  364
- DAC2L (Offset Address: 0X40)
  365
- DAC2_BADDR (Offset Address: 0X44)
  366
- DAC3_CTRL (Offset Address: 0X48)
  367
- DAC3L (Offset Address: 0X4C)
  368
- DAC3_BADDR (Offset Address: 0X50)
  369
- ADC1_CTRL (Offset Address: 0X54)
  370
- ADC1L (Offset Address: 0X58)
  371
- ADC1_BADDR (Offset Address: 0X5C)
  372
- ADC2_CTRL (Offset Address: 0X60)
  373
- ADC2L (Offset Address: 0X64)
  374
- ADC2_BADDR (Offset Address: 0X68)
  375
- ADC3_CTRL (Offset Address: 0X6C)
  376
- ADC3L (Offset Address: 0X70)
  377
- ADC3_BADDR (Offset Address: 0X74)
  378
- AC97 Interface Configuration
  379
- AC97U Function Overview
  380
- Block Diagram
  380
- AC-Link Interface Support Format
  381
- Cache Buffer
  381
- DMA Control
  382
- Interrupt Control
  383
- SRC (Sample Rate Converter)
  383
- AC-Link Interface Data Transfer Format
  386
- Data Output to Codec
  392
- Data Input from Codec
  393
- DMA Transfer
  394
- Special Interrupts
  399
- AC97U Suspend Transition Procedure
  400
- Filter RAM
  401
Appendix A Cautions

402
- Adjusting Skew of PCI Clock
  402
Appendix B Restrictions

403
- Noise During Operation of AC97
  403
- Phenomenon
  403
- Preventive Measures
  403
- Erroneous Recognition of PC Card
  404
- Phenomenon
  404
- Preventive Measures
  405
- Pulling up PC Card Pins
  406
- Phenomenon
  406
- Preventive Measures
  406
- Incorrect Playback with AIU
  407
- Phenomenon
  407
- Preventive Measures
  407
Appendix C Index

408

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NEC uPD31173 Manuals

NEC uPD31173 User Manual (413 pages)

Table of Contents

Chapter 1 Overview

Chapter 2 Pin Functions

Chapter 3 Bcu (Bus Control Unit)

Chapter 4 Dmaau (Dma Address Unit)

Chapter 5 Dcu (Dma Control Unit)

Chapter 6 Cmu (Clock Mask Unit)

Chapter 7 Icu (Interrupt Control Unit)

Chapter 8 Giu (General-Purpose I/O Unit)

Chapter 9 Piu (Touch Panel Interface Unit)

Chapter 10 Aiu (Audio Interface Unit)

Chapter 11 Kiu (Keyboard Interface Unit)

Chapter 12 Ps2U (Ps/2 Unit)

Chapter 13 Cardu1, Cardu2 (Pc Card Units)

Chapter 14 Usbu (Universal Serial Bus Unit)

Chapter 15 Ac97U (Ac97 Unit)

Appendix A Cautions

Appendix B Restrictions

Appendix C Index

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