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minimum capacity, the partitions are allowed to start or continue running. If processor
capacity is insufficient to run a partition at its minimum value, then starting that partition
results in an error condition that must be resolved.
4.2.2 General detection and deallocation of failing components
Runtime correctable or recoverable errors are monitored to determine if there is a pattern of
errors. If these components reach a predefined error limit, the service processor initiates an
action to deconfigure the faulty hardware, helping to avoid a potential system outage and to
enhance system availability.
Persistent deallocation
To enhance system availability, a component that is identified for deallocation or
deconfiguration on a POWER processor-based system is flagged for persistent deallocation.
Component removal can occur either dynamically (while the system is running) or at boot
time (initial program load, or IPL), depending both on the type of fault and when the fault is
detected.
In addition, runtime unrecoverable hardware faults can be deconfigured from the system after
the first occurrence. The system can be rebooted immediately after failure and resume
operation on the remaining stable hardware. This way prevents the same faulty hardware
from affecting system operation again. The repair action is deferred to a more convenient,
less critical time.
Persistent deallocation functions include the following items:
Processor
L2/L3 cache lines (cache lines are dynamically deleted)
Memory
Deconfigure or bypass failing I/O adapters
Processor instruction retry
As in POWER6, the POWER7 and POWER7+ processor has the ability to retry processor
instruction and alternate processor recovery for a number of core related faults. This ability
significantly reduces exposure to both permanent and intermittent errors in the processor
core.
Intermittent errors, often because of cosmic rays or other sources of radiation, are generally
not repeatable.
With this function, when an error is encountered in the core, in caches and certain logic
functions, the POWER7 and POWER7+ processor first automatically retries the instruction. If
the source of the error was truly transient, the instruction succeeds and the system continues
as before.
On IBM systems prior to POWER6, this error caused a checkstop.
Alternate processor retry
Hard failures are more difficult, being permanent errors that are replicated each time that the
instruction is repeated. Retrying the instruction does not help in this situation because the
instruction will continue to fail.
As in POWER6, the POWER7 and POWER7+ processors have the ability to extract the failing
instruction from the faulty core and retry it elsewhere in the system for a number of faults,
after which the failing core is dynamically deconfigured and scheduled for replacement.
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IBM Power 770 and 780 (9117-MMD, 9179-MHD) Technical Overview and Introduction
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