System Block Diagram - Sharp LC-60E77UN Service Manual
Lcd color television
Hide thumbs
Also See for LC-60E77UN:
- Operation manual (58 pages) ,
- Dimensional drawing (1 page) ,
- Brochure & specs (28 pages)
Table of Contents
Advertisement
[3] SYSTEM BLOCK DIAGRAM
SYSTEM BLOCK DIAGRAM
J
CVBS
INPUT
LR
L/R
1
Component
YPbPr
S Video
S-Video
INPUT
2
LR
L/R
I
YPbPr
Component
CVBS
INPUT
CVBS
3
L/R
LR
(SIDE)
+13.5V
SP
H
SP
P2701
SP AMP
EXT-SP
YDA148QZ
Audio Out
L/R
Disclete
G
+3.3V
TU1102
+1.8V
RF IN
Analog/
N_TUN_RST
Digital
CVBS
Tuner
F
E
BU+3.3V
IC9003
TxD/RxD
RS232C TxRx
RS-232C
M3221EIP
No.9 pin RC Passthrough
IC1304 Q1312
OPTICAL
D
OUT
INPUT
RGB/HDMI
RGB_LR
Audio
4/6
(Mini Plug)
INPUT
D-SUB
4
RGB
IC1809
+5V
HDMI_WP
C
EEPROM
INPUT
HDMI 1
5
(SIDE)
INPUT
HDMI 2
7
INPUT
HDMI 3
6
B
INPUT
HDMI 4
8
Service
A
J8001
USB
1
2
3
4
AMP_MUTE
STANDBY
IC2701
PROTECT
Disclete
Mute
Mute
+5V
LINE_MUTE
IC1301
I/O
IO_SPDIF_MUTE
LA79200V
TUNER_I2C
(100KHz 5V/3.3V)
I2C_0
(100KHz 5V)
+3.3V
CPU_SPDIF_OUT
I2C1 (400KHz)
+3.3V
IC1605
+3.3V
IC8454
TMDS-SW
EEPROM
SII9287
64kbit
In1
In2
In0
IC1801
+3.3V
In3
TMDS-SW
SII9287
BU+3.3V
In0
SP_CEC
IC1603
IC1607
In2
Buffer
LCX125FT
In1
In3
IC1606
HDMI_CEC_IN
5
6
7
8
MAIN
TUNER_I2C
I2C1 (400KHz)
I2C_1
I2C_0
N_TUN_RST
D_IF in
SIF
AGC
RGB in
HDMIin
IC8001
MT5391F(Full-HD)
IXC579WJ
27.000MHz
X8001
Digital AV decode & Main CPU
X'tal
SPOUT_L/R
LINE_L/R
Audio out
V1_L/R
V2_L/R
V3_L/R
Audio in
RGB_L/R
SPDIF
DTV/SPDIF
N_CPU_RST
RESET
N_DBG_RST
N_SRESET
+3.3V
P9301
IC8453
Software Writing
NAND FLASH
512Mbit
Connector
SP_CEC_O_UCOM
SP_CEC_I_UCOM
HDMI_CEC_O_UCOM
HDMI_CEC_I_UCOM
9
10
11
12
8 – 3
LC-60E77UN/LC-65E77UM/LC-C6077UN/LC-C6577UM
BU+3.3V
IC2001
Reset
P2001
Connector
for Software
Write
Thermister
/Emulator
THERMO
DET_PNL12V
A/D
BU+3.3V
RxD,TxD
FRAME,R/L,U/D,TEMP [3:1],O/
IC2002
I/O
M16C/64
IC2008
STB
IXC786WJ
I/O
Gate
Monitor Micom
7WH126FU
RxD,TxD
EEPROM_SCL/SDA
UART
I2C
IC2004
WP
EEPROM
20MHz
S24CS08J
20MHz
ERR_PNL
STB_CPU
+8.0V
Xtal
RST_FLS_CPU
AC_DET
+3.3V
RS_BUF_CNT
+1.8V
+1.25V
CNVss
I/O
I/O
DET_SYNC
+1.05V
PM_REQ, CBOOTS
I/O
A/D
N_SRESET
I/O
I/O
INT0
OPWM1
OPWM2
BL_I2C_EN
PNL_WP, SOUSA_WP
PNL_I2C_EN
IC8152-3
DDR2(1066)
512Mbit
P9201
BackUp
Debug
Line
Connector
BU+5V
BU+3.3V
Main Line
A8V
PNL_ON
A3.3V
to P9701
5V
D3.3V
D1.8V
D1.25V
D1.05V
+3.3V
Q2002
Power Circuit
Tr
+3.3V
BU+3.3V
KM P2002(4p)
RA P2003(10p)
KM P151 (5p)
RA P102(10p)
KEY
LED
POWER
MEN
R/C
INPUT
OPC
Ch-Up/Down
LED
Vol-Up/Down
13
14
15
16
SHIP_EN,PNEL_EN,LVDS_SEL
B_STATUS
Von
BU+3.3V
OFL1
IC2604
OFL2
I2C SW
IC2601
I2C SW
UR13V
BU5V
PNL_ON
From CPU
ICON
17
18
19
Hide quick links:
Advertisement
Table of Contents
