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15.3.15 DAC2L (offset address: 0x40)
Bit
31
Name
RFU
R/W
R
After reset
0
Bit
23
Name
RFU
R/W
R
After reset
0
Bit
15
Name
DAC2L15
R/W
R/W
After reset
0
Bit
7
Name
DAC2L7
R/W
R/W
After reset
0
Bit
Name
31:16
RFU
15:0
DAC2L(15:0)
• • • • DMA transfer count
For a single DMA transfer, 32 bits × 4 data are input from memory.
Also, the data size that is output at one time to the Codec is 16 bits of the data that was input from memory.
Therefore, when 1 is set in the DAC2L(15:0) area, 32 bits × 4 data are input from memory and data is output 8
times to the Codec.
CHAPTER 15 AC97U (AC97 UNIT)
30
29
RFU
RFU
R
R
0
0
22
21
RFU
RFU
R
R
0
0
14
13
DAC2L14
DAC2L13
DAC2L12
R/W
R/W
0
0
6
5
DAC2L6
DAC2L5
R/W
R/W
0
0
Reserved. Write 0 to these bits. 0 is returned after a read.
DAC2 DMA transfer count
User's Manual U14579EJ2V0UM
28
27
RFU
RFU
R
R
0
0
20
19
RFU
RFU
R
R
0
0
12
11
DAC2L11
DAC2L10
R/W
R/W
0
0
4
3
DAC2L4
DAC2L3
DAC2L2
R/W
R/W
0
0
Function
26
25
RFU
RFU
RFU
R
R
0
0
18
17
RFU
RFU
RFU
R
R
0
0
10
9
DAC2L9
DAC2L8
R/W
R/W
R/W
0
0
2
1
DAC2L1
DAC2L0
R/W
R/W
R/W
0
0
24
R
0
16
R
0
8
0
0
0
365
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